Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits

IEEE Journal of Solid-State Circuits

Volumn 28, Issue 4, 1993, Pages 420-430

  Su, David K ^a   Loinaz, Marc J ^a   Wooley, Bruce A ^a   Masui, Shoichi ^b  

^a STANFORD UNIVERSITY   (United States)

^b NIPPON STEEL CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CROSSTALK; DIGITAL CIRCUITS; INTEGRATED CIRCUIT MANUFACTURE; MOS DEVICES; SPURIOUS SIGNAL NOISE;

DIGITAL MOS CIRCUITS; MIXED-SIGNAL IC; SPICE SIMULATIONS; SUBSTRATE NOISE;

INTEGRATED CIRCUITS;

EID: 0027576336     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.210024     Document Type: Article

References (12)

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