Asynchronous does not imply low power, but …

Low-Power CMOS Design

Volumn , Issue , 1998, Pages 227-232

  Chandrakasan, Anantha ^b   Van Gageldonk, Hans ^a   Kessels, Joep ^a   Niessen, Cees ^a   Peeters, Ad ^a   Roncken, Marly ^a   Van De Wiel, Rik ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 85013575432     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1109/9780470545058.sect7     Document Type: Chapter

References (13)

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2. S. B. Furber, J. D. Garside, S. Temple, and J. Liu. “AMULET2e: An asynchronous embedded controller,” Advanced Research in Asynchronous Circuits and Systems, IEEE Comp Soc Press, 1997.
3. K. van Berkel et al., “A fully-asynchronous low-power error corrector for the DCC player.” IEEE Journal of Solid-State Circuits, vol. 29, no. 12,1994, pp. 1429-1439.
4. K. van Berkel et al., “A single-rail re-implementation of a DCC error detector using a generic standard-cell library.” Asynchronous Design Methodologies, IEEE Comp Soc Press, 1995, pp. 72-79.
5. J. Kessels. “VLSI programming of a low-power asynchronous Reed-Solomon decoder for the DCC player.” Asynchronous Design Methodologies, IEEE Comp Soc Press, 1995, p. 44-52.
6. L. S. Nielsen and J. Sparsp, “A low-power asynchronous data-path for a FIR filter bank,” Advanced Research in Asynchronous Circuits and Systems, IEEE Comp Soc Press, 1996.
7. J. Kessels and P. Marston. “Designing asynchronous standby circuits for a low-power pager.” Advanced Research in Asynchronous Circuits and Systems, IEEE Comp Soc Press, 1997.
8. K. van Berkel and M. Rem, “VLSI programming of asynchronous circuits for low power.” In G. Birtwistle and A. Davis, editors, Asynchronous Digital Circuit Design, Workshops in Computing, Springer-Verlag, 1995, p. 152-210.
9. J. Tiemo., R. Manohar, and A. Martin, “Energy and entropy measures for low power design,” Advanced Research in Asynchronous Circuits and Systems, IEEE Comp Soc Press, 1996.
10. V. van Kaenel, D. Aebischer, C. Piguet, and E. Dijkstra, “A 320-MHz, 1.5mW at 1.35V CMOS PLL for microprocessor clock generation,” IEEE Journal of Solid-State Circuits, vol. 31, no. 11, 1996, pp. 1715-1722.
11. A. Chandrakasan, V. Gutnik, and T. Xanthopoulos, “Data driven signal processing: An approach for energy efficient computing.” Low Power Workshop, 1996, p. 347-352.
12. A. Peeters and K. van Berkel, “Single-rail handshake circuits,” Asynchronous Design Methodologies, IEEE Comp Soc Press, 1995, pp. 53-62.
13. L. S. Nielsen et al., “Low-power operation using self-timed and adaptive scaling of the supply voltage,” IEEE Trans on VLSI Systems, vol. 2, no. 4, 1994, pp. 391-397.