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Volumn E80-C, Issue 7, 1997, Pages 905-909

An accurate model of fully-depleted surrounding gate transistor (FD-SGT)

Author keywords

Current voltage clmracteristics; FD SGT; SGT; Threshold vltage

Indexed keywords

CAPACITANCE; COMMUNICATION CHANNELS (INFORMATION THEORY); CURRENT VOLTAGE CHARACTERISTICS; SEMICONDUCTOR DEVICE MODELS;

EID: 0031187306     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (48)

References (13)
  • 2
    • 0029545790 scopus 로고    scopus 로고
    • S.Maegawa, T.Ipposhi, H.Nishimura, H.Kuriyama, O.Tanina, Y.Inoue, T.Nishimura, and N.Tsubouchi, 1 Obit DRAM and beyond, IEEE Trans. Electron Devices, vol.42, no. 12, pp.2117-2123, Dec. 1995.
    • S.Maeda, S.Maegawa, T.Ipposhi, H.Nishimura, H.Kuriyama, O.Tanina, Y.Inoue, T.Nishimura, and N.Tsubouchi, Impact of a vertical -shape transistor (VOX) cell for 1 Obit DRAM and beyond, IEEE Trans. Electron Devices, vol.42, no. 12, pp.2117-2123, Dec. 1995.
    • Impact of A Vertical -shape Transistor (VOX) Cell for
    • Maeda, S.1
  • 6
    • 0024870892 scopus 로고    scopus 로고
    • H.Takato, N.Okabe, T.Yamada, T.Ozaki, S.Inoue, K.Hashimoto, K.Hieda, A.Nitayama, F.Horiguchi, and F.Masuoka, 64/256 Mbit DRAMs, IEDM Tech. Dig., pp.23-26, 1989.
    • K.Sunouchi, H.Takato, N.Okabe, T.Yamada, T.Ozaki, S.Inoue, K.Hashimoto, K.Hieda, A.Nitayama, F.Horiguchi, and F.Masuoka, A surrounding gate transistor (SGT) cell for 64/256 Mbit DRAMs, IEDM Tech. Dig., pp.23-26, 1989.
    • A Surrounding Gate Transistor (SGT) Cell for
    • Sunouchi, K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.