Robust circuit and system design methodologies for nanometer-scale devices and single-electron transistors

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 12, Issue 11, 2004, Pages 1156-1166

  Schmid, Alexandre ^a   Leblebici, Yusuf ^a  

^a EPFL   (Switzerland)

Author keywords

Device and circuit reliability; Fault tolerance; Nanoelectronics; Very deep submicron CMOS

Indexed keywords

BOOLEAN ALGEBRA; CMOS INTEGRATED CIRCUITS; FAULT TOLERANT COMPUTER SYSTEMS; NEURAL NETWORKS; OPTIMIZATION; REDUNDANCY; RELIABILITY; SYSTEMS ANALYSIS; TRANSIENTS; TRANSISTORS; VLSI CIRCUITS;

DEVICE AND CIRCUIT RELIABILITY; DEVICE DIMENSIONS; NANOELECTRONICS; VERY-DEEP SUBMICRON CMOS;

NANOTECHNOLOGY;

EID: 9244230573     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2004.836292     Document Type: Article

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