Future Mask writers requirements for the Sub 10 nm node era

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 8522, Issue , 2012, Pages

  Chandramouli, Mahesh ^a   Abboud, Frank ^a   Wilcox, Nathan ^a   Sowers, Andrew ^a   Cole, Damon ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE; MASKS; NANOTECHNOLOGY;

CRITICAL DIMENSION UNIFORMITIES; EQUIPMENT SUPPLIERS; PROOF OF CONCEPT; TECHNICAL DIFFICULTIES; TECHNICAL RISKS; TECHNOLOGY NODES; TECHNOLOGY TRENDS; WAFER PATTERNING;

PHOTOMASKS;

EID: 85077066716     PISSN: 0277786X     EISSN: 1996756X     Source Type: Conference Proceeding    
DOI: 10.1117/12.977172     Document Type: Conference Paper

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