Modular 128-Channel Δ - ΔΣ Analog Front-End Architecture Using Spectrum Equalization Scheme for 1024-Channel 3-D Neural Recording Microsystems

IEEE Journal of Solid-State Circuits

Volumn 53, Issue 2, 2018, Pages 501-514

  Park, Sung Yun ^a   Cho, Jihyun ^b   Na, Kyounghwan ^a   Yoon, Euisik ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

^b APPLE INC   (United States)

Author keywords

continuous time (CT) ; energy area product; low power; massive parallel; neural recording microsystem; spectrum equalization; modulated analog front end ( AFE); modulation

Indexed keywords

CONTINUOUS TIME SYSTEMS; ELECTRODES; ENERGY EFFICIENCY; ENERGY UTILIZATION; MICROSYSTEMS; NEURONS; NEUROPHYSIOLOGY; PROBES; SIGNAL TO NOISE RATIO; SILICON; SYSTEM-ON-CHIP;

ANALOG FRONT END; CONTINUOUSTIME; ENERGY-AREA PRODUCT; LOW POWER; MASSIVE-PARALLEL; NEURAL RECORDINGS; POWER DEMANDS; SPECTRUM EQUALIZATION;

EQUALIZERS;

EID: 85033708819     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2017.2764053     Document Type: Article

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