Dynamic resource sharing for high-performance 3-D networks-on-chip

IEEE Computer Architecture Letters

Volumn 15, Issue 1, 2016, Pages 5-8

  Rezaei, Seyyed Hossein Seyyedaghaei ^a   Mazloumi, Abbas ^a   Modarressi, Mehdi ^a   Lotfi Kamran, Pejman ^b  

^a UNIVERSITY OF TEHRAN   (Iran)

^b INSTITUTE FOR RESEARCH IN FUNDAMENTAL SCIENCES IPM   (Iran)

Author keywords

3 D integration; Network on chip; Resource sharing

Indexed keywords

BANDWIDTH; DISTRIBUTED COMPUTER SYSTEMS; ROUTERS; VLSI CIRCUITS;

3-D INTEGRATION; DYNAMIC RESOURCE SHARING; INTER-LAYER COMMUNICATION; ON CHIP COMMUNICATION; ORDERS OF MAGNITUDE; PARALLEL WORKLOADS; RESOURCE SHARING; ROUTER MICROARCHITECTURE;

NETWORK-ON-CHIP;

EID: 84976482172     PISSN: 15566056     EISSN: None     Source Type: Journal    
DOI: 10.1109/LCA.2015.2448532     Document Type: Article

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