메뉴 건너뛰기




Volumn 2015-January, Issue January, 2015, Pages 471-483

Hi-Rise: A High-Radix Switch for 3D Integration with Single-Cycle Arbitration

Author keywords

3D Integration; Arbitration; High Radix Switch

Indexed keywords

COMPUTER ARCHITECTURE; INTEGRATION;

EID: 84937689360     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2014.45     Document Type: Conference Paper
Times cited : (9)

References (32)
  • 1
    • 77952123736 scopus 로고    scopus 로고
    • A 48-core ia-32 message-passing processor with dvfs in 45nm CMOS
    • J. Howard, S. Dighe et al., "A 48-core ia-32 message-passing processor with dvfs in 45nm cmos," in ISSCC, 2010.
    • (2010) ISSCC
    • Howard, J.1    Dighe, S.2
  • 2
    • 36849030305 scopus 로고    scopus 로고
    • On-chip interconnection architecture of the tile processor
    • D. Wentzlaff, P. Griffin et al., "On-chip interconnection architecture of the tile processor," IEEE Micro, vol. 27, no. 5, pp. 15-31, 2007.
    • (2007) IEEE Micro , vol.27 , Issue.5 , pp. 15-31
    • Wentzlaff, D.1    Griffin, P.2
  • 3
    • 34547261834 scopus 로고    scopus 로고
    • Thousand core chips: A technology perspective
    • S. Borkar, "Thousand core chips: a technology perspective," in DAC-44, 2007.
    • (2007) DAC-44
    • Borkar, S.1
  • 4
    • 47349129525 scopus 로고    scopus 로고
    • Flattened butterfly topology for on-chip networks
    • J. Kim, J. Balfour, and W. Dally, "Flattened butterfly topology for on-chip networks," in MICRO-40, 2007.
    • (2007) MICRO-40
    • Kim, J.1    Balfour, J.2    Dally, W.3
  • 5
    • 84880304241 scopus 로고    scopus 로고
    • Scaling towards kilo-core processors with asymmetric high-radix topologies
    • N. Abeyratne, R. Das et al., "Scaling towards kilo-core processors with asymmetric high-radix topologies," in HPCA-19, 2013.
    • (2013) HPCA-19
    • Abeyratne, N.1    Das, R.2
  • 6
    • 84860678550 scopus 로고    scopus 로고
    • Centip3de: A 3930dmips/w configurable near-threshold 3d stacked system with 64 arm cortex-m3 cores
    • D. Fick, R. G. Dreslinski et al., "Centip3de: A 3930dmips/w configurable near-threshold 3d stacked system with 64 arm cortex-m3 cores," in ISSCC, 2012.
    • (2012) ISSCC
    • Fick, D.1    Dreslinski, R.G.2
  • 7
    • 52649135185 scopus 로고    scopus 로고
    • MIRA: A multilayered interconnect router architecture
    • D. Park, S. Eachempati et al., "MIRA: A Multilayered Interconnect Router Architecture," in ISCA-35, 2008.
    • (2008) ISCA-35
    • Park, D.1    Eachempati, S.2
  • 8
    • 33845914023 scopus 로고    scopus 로고
    • Design and management of 3d chip multiprocessors using network-in-memory
    • F. Li, C. Nicopoulos et al., "Design and management of 3d chip multiprocessors using network-in-memory," in ISCA, 2006.
    • (2006) ISCA
    • Li, F.1    Nicopoulos, C.2
  • 9
    • 35348908288 scopus 로고    scopus 로고
    • A novel dimensionallydecomposed router for on-chip communication in 3D architectures
    • J. Kim, C. Nicopoulos et al., "A novel dimensionallydecomposed router for on-chip communication in 3D architectures," ISCA-34, 2007.
    • (2007) ISCA-34
    • Kim, J.1    Nicopoulos, C.2
  • 10
    • 65349146389 scopus 로고    scopus 로고
    • A low-radix and low-diameter 3d interconnection network design
    • Y. Xu, Y. Du, B. Zhao, X. Zhou, Y. Zhang, and J. Yang, "A low-radix and low-diameter 3d interconnection network design," in HPCA, 2009.
    • (2009) HPCA
    • Xu, Y.1    Du, Y.2    Zhao, B.3    Zhou, X.4    Zhang, Y.5    Yang, J.6
  • 11
    • 84860653566 scopus 로고    scopus 로고
    • A 4.5tb/s 3.4tb/s/w 64x64 switch fabric with self-updating least recently granted priority and quality of service arbitration in 45nm CMOS
    • S. Satpathy, K. Sewell et al., "A 4.5tb/s 3.4tb/s/w 64x64 switch fabric with self-updating least recently granted priority and quality of service arbitration in 45nm cmos," in ISSCC, 2012.
    • (2012) ISSCC
    • Satpathy, S.1    Sewell, K.2
  • 12
    • 84862310416 scopus 로고    scopus 로고
    • Swizzle-switch networks for many-core systems
    • K. Sewell, R. Dreslinski et al., "Swizzle-switch networks for many-core systems," in JETCAS, 2012.
    • (2012) JETCAS
    • Sewell, K.1    Dreslinski, R.2
  • 15
    • 84863541921 scopus 로고    scopus 로고
    • High radix self-arbitrating switch fabric with multiple arbitration schemes and quality of service
    • S. Satpathy, R. Das, R. Dreslinski, D. Sylvester, T. Mudge, and D. Blaauw, "High radix self-arbitrating switch fabric with multiple arbitration schemes and quality of service," in DAC-49, 2012.
    • (2012) DAC-49
    • Satpathy, S.1    Das, R.2    Dreslinski, R.3    Sylvester, D.4    Mudge, T.5    Blaauw, D.6
  • 17
    • 76749124429 scopus 로고    scopus 로고
    • Application-aware prioritization mechanisms for on-chip networks
    • R. Das, O. Mutlu, T. Moscibroda, and C. R. Das, "Application-aware prioritization mechanisms for on-chip networks," in MICRO-42, 2009.
    • (2009) MICRO-42
    • Das, R.1    Mutlu, O.2    Moscibroda, T.3    Das, C.R.4
  • 18
    • 21644454187 scopus 로고    scopus 로고
    • Pinpointing representative portions of large intel itanium programs with dynamic instrumentation
    • H. Patil, R. Cohn et al., "Pinpointing representative portions of large intel itanium programs with dynamic instrumentation," in MICRO-37, 2004.
    • (2004) MICRO-37
    • Patil, H.1    Cohn, R.2
  • 20
    • 35348835387 scopus 로고    scopus 로고
    • Flattened butterfly: A costefficient topology for high-radix networks
    • J. Kim, W. J. Dally, and D. Abts, "Flattened butterfly: a costefficient topology for high-radix networks," in ISCA-34, 2007.
    • (2007) ISCA-34
    • Kim, J.1    Dally, W.J.2    Abts, D.3
  • 24
    • 70349498657 scopus 로고    scopus 로고
    • High performance non-blocking switch design in 3d die-stacking technology
    • D. L. Lewis, S. Yalamanchili, and H.-H. Lee, "High performance non-blocking switch design in 3d die-stacking technology," in ISVLSI, 2009.
    • (2009) ISVLSI
    • Lewis, D.L.1    Yalamanchili, S.2    Lee, H.-H.3
  • 26
    • 79951719950 scopus 로고    scopus 로고
    • Probabilistic distance-based arbitration: Providing equality of service for many-core cmps
    • M. M. Lee, J. Kim, D. Abts, M. Marty, and J. W. Lee, "Probabilistic distance-based arbitration: Providing equality of service for many-core cmps," in MICRO-43, 2010.
    • (2010) MICRO-43
    • Lee, M.M.1    Kim, J.2    Abts, D.3    Marty, M.4    Lee, J.W.5
  • 27
    • 56749098510 scopus 로고    scopus 로고
    • Age-based packet arbitration in large-radix k-ary n-cubes
    • D. Abts and D. Weisser, "Age-based packet arbitration in large-radix k-ary n-cubes," in SC, 2007.
    • (2007) SC
    • Abts, D.1    Weisser, D.2
  • 28
    • 84937693999 scopus 로고    scopus 로고
    • A fast arbitration scheme for terabit packet switches
    • H. J. Chao, C. Lam, and X. Guo, "A fast arbitration scheme for terabit packet switches," in GLOBECOM, 1999.
    • (1999) GLOBECOM
    • Chao, H.J.1    Lam, C.2    Guo, X.3
  • 30
    • 0033902392 scopus 로고    scopus 로고
    • Firm: A class of distributed scheduling algorithms for high-speed atm switches with multiple input queues
    • D. N. Serpanos and P. Antoniadis, "Firm: A class of distributed scheduling algorithms for high-speed atm switches with multiple input queues," in INFOCOM, 2000.
    • (2000) INFOCOM
    • Serpanos, D.N.1    Antoniadis, P.2
  • 31
    • 0032655137 scopus 로고    scopus 로고
    • The islip scheduling algorithm for inputqueued switches
    • N. McKeown, "The islip scheduling algorithm for inputqueued switches," Networking, IEEE/ACM Trans. on, 1999.
    • (1999) Networking IEEE/ACM Trans. on
    • McKeown, N.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.