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Volumn 2002-January, Issue , 2002, Pages 31-36

Performance comparison of VLV, ULV, and ECR tests [biomedical IC product]

Author keywords

Biomedical engineering; Circuit faults; Circuit testing; Current measurement; Energy consumption; Integrated circuit testing; Logic testing; Manufacturing; Power engineering and energy; Voltage

Indexed keywords

BIOMEDICAL ENGINEERING; ELECTRIC CURRENT MEASUREMENT; ELECTRIC POTENTIAL; ENERGY UTILIZATION; INTEGRATED CIRCUIT TESTING; MANUFACTURE; VLSI CIRCUITS;

EID: 84948420320     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTS.2002.1011107     Document Type: Conference Paper
Times cited : (2)

References (16)
  • 1
    • 0034476391 scopus 로고    scopus 로고
    • Test Method Evaluation Experiments & Data
    • P. Nigh, A. Gattiker, "Test Method Evaluation Experiments & Data", IEEE Proc. Int. Test Conf., pp. 454-463, 2000.
    • (2000) IEEE Proc. Int. Test Conf. , pp. 454-463
    • Nigh, P.1    Gattiker, A.2
  • 2
    • 0027808270 scopus 로고
    • Very-Low-Voltage Testing for Weak CMOS Logic ICs
    • Oct
    • H. Hao, E. J. McCluskey, "Very-Low-Voltage Testing for Weak CMOS Logic ICs", IEEE Proc. Int. Test Conf., pp. 275-284, Oct. 1993.
    • (1993) IEEE Proc. Int. Test Conf. , pp. 275-284
    • Hao, H.1    McCluskey, E.J.2
  • 6
    • 0029519859 scopus 로고
    • Transient Power Supply Current Testing of Digital Circuits
    • Oct
    • R. Z. Makki, S. Su, T. Nagle, "Transient Power Supply Current Testing of Digital Circuits," IEEE Proc. Int. Test Conf., pp. 892-901, Oct. 1995.
    • (1995) IEEE Proc. Int. Test Conf. , pp. 892-901
    • Makki, R.Z.1    Su, S.2    Nagle, T.3
  • 7
    • 0031361718 scopus 로고    scopus 로고
    • Identification of Defective CMOS Devices Using Correlation and Regression Analysis of Frequency Domain Transient Signal Data
    • J. F. Plusquellic, D. M. Chiarulli, S. P. Levitan, "Identification of Defective CMOS Devices Using Correlation and Regression Analysis of Frequency Domain Transient Signal Data," IEEE Proc. Int. Test Conf., pp. 40-49, 1997.
    • (1997) IEEE Proc. Int. Test Conf. , pp. 40-49
    • Plusquellic, J.F.1    Chiarulli, D.M.2    Levitan, S.P.3
  • 10
    • 0032320511 scopus 로고    scopus 로고
    • Process-Tolerant Test with Energy Consumption Ratio
    • Oct.
    • B. Vinnakota, W. Jiang, D. Sun, "Process-Tolerant Test with Energy Consumption Ratio", IEEE Proc. Int. Test Conf., pp. 1027-1036, Oct., 1998.
    • (1998) IEEE Proc. Int. Test Conf. , pp. 1027-1036
    • Vinnakota, B.1    Jiang, W.2    Sun, D.3
  • 12
    • 0033908160 scopus 로고    scopus 로고
    • IC Test Using the Energy Consumption Ratio
    • Jan
    • W. Jiang, B. Vinnakota, "IC Test Using the Energy Consumption Ratio," IEEE Trans. on CAD, Vol. 19, No. 1, pp. 129-141, Jan. 2000.
    • (2000) IEEE Trans. on CAD , vol.19 , Issue.1 , pp. 129-141
    • Jiang, W.1    Vinnakota, B.2
  • 14
    • 0034478807 scopus 로고    scopus 로고
    • An Analysis of the Delay Defect Detection Capability of the ECR Test Method
    • Oct
    • S. Kim, S. Chakravarty, B. Vinnakota, "An Analysis of the Delay Defect Detection Capability of the ECR Test Method," IEEE Proc. Int. Test Conf., pp. 1060-1069, Oct. 2000.
    • (2000) IEEE Proc. Int. Test Conf. , pp. 1060-1069
    • Kim, S.1    Chakravarty, S.2    Vinnakota, B.3
  • 15
    • 0035683905 scopus 로고    scopus 로고
    • Practical Application of Energy Consumption Ratio Test
    • Oct
    • E. Peterson, W. Jiang, "Practical Application of Energy Consumption Ratio Test," IEEE Proc. Int. Test Conf., Oct. 2001.
    • (2001) IEEE Proc. Int. Test Conf.
    • Peterson, E.1    Jiang, W.2
  • 16
    • 0035361795 scopus 로고    scopus 로고
    • Defect-Oriented Test Scheduling
    • Jun
    • W. Jiang, B. Vinnakota, "Defect-Oriented Test Scheduling," IEEE Trans. on VLSI Systems, Vol. 9, No. 3, pp. 427-438, Jun. 2001.
    • (2001) IEEE Trans. on VLSI Systems , vol.9 , Issue.3 , pp. 427-438
    • Jiang, W.1    Vinnakota, B.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.