Instruction-level distributed processing for symmetric-key cryptography

Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003

Volumn , Issue , 2003, Pages

  Elbirt, A J ^a   Paar, Christof ^b  

^a University of Massachusetts   (United States)

^b RUHR UNIVERSITY BOCHUM   (Germany)

Author keywords

Algorithm agility; Block cipher; Cryptography; FPGA; VHDL

Indexed keywords

COMPUTER HARDWARE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DISTRIBUTED COMPUTER SYSTEMS; DISTRIBUTED PARAMETER NETWORKS; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; HIGH SPEED CAMERAS; LYAPUNOV METHODS; NETWORK ARCHITECTURE; RECONFIGURABLE ARCHITECTURES; SECURITY OF DATA;

ALGORITHM AGILITY; BLOCK CIPHERS; DISTRIBUTED PROCESSING; EFFICIENT IMPLEMENTATION; FUNCTIONAL REQUIREMENT; HARDWARE ARCHITECTURE; SYMMETRIC KEY CRYPTOGRAPHY; TOP LEVEL ARCHITECTURES;

CRYPTOGRAPHY;

EID: 84947230214     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2003.1213181     Document Type: Conference Paper

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