ConCISe: A compiler-driven CPLD-based instruction set accelerator

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn , Issue , 1999, Pages 92-101

  Kastrup, Bernardo ^a   Bink, Arjan ^a   Hoogerbrugge, Jan ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CRYPTOGRAPHY; DATA STORAGE EQUIPMENT; FIELD PROGRAMMABLE GATE ARRAYS; MICROPROCESSOR CHIPS; REDUCED INSTRUCTION SET COMPUTING;

CENTRAL PROCESSING UNIT; FIELD PROGRAMMABLE LOGIC; RECONFIGURABLE FUNCTIONAL UNIT; RECONFIGURATION OVERHEAD; SMART COMPILER;

PROGRAM COMPILERS;

EID: 0033488529     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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