Efficient soft error vulnerability estimation of complex designs

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 2015-April, Issue , 2015, Pages 103-108

  Mirkhani, Shahrzad ^a   Mitra, Subhasish ^b   Cher, Chen Yong ^c   Abraham, Jacob ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^b STANFORD UNIVERSITY   (United States)

^c IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FLIP FLOP CIRCUITS; RADIATION HARDENING;

COMPLEX DESIGNS; DESIGN VULNERABILITIES; ERROR INJECTION; LARGE AMOUNTS; LARGE SYSTEM; MEMORY ELEMENT; OUT-OF-ORDER PROCESSORS; REASONABLE ACCURACY;

ERROR CORRECTION;

EID: 84945952207     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.7873/date.2015.0367     Document Type: Conference Paper

References (18)

1. Ghazanfar Asadi and Mehdi B Tahoori. An accurate SER estimation method based on propagation probability [soft error rate]. In Proceedings of Design, Automation and Test in Europe, 2005, pages 306-307. IEEE, 2005
2. C Bottoni, M Glorieux, JM Daveau, G Gasiot, F Abouzeid, S Clerc, L Naviner, and P Roche. Heavy ions test result on a 65nm Sparc-V8 radiation-hard microprocessor. In IEEE International Reliability Physics Symposium, 2014. IEEE, 2014
3. Hungse Cha, Elizabeth M Rudnick, Gwan S Choi, Janak H Patel, and Ravishankar K Iyer. A fast and accurate gate-level transient fault simulation environment. In The Twenty-Third International Symposium on Fault-Tolerant Computing, 1993. FTCS-23. Digest of Papers., pages 310-319. IEEE, 1993
4. Hyungmin Cho, Shahrzad Mirkhani, Chen-Yong Cher, Jacob A Abraham, and Subhasish Mitra. Quantitative evaluation of soft error injection techniques for robust system design. In 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 2013, pages 1-10. IEEE, 2013
5. Abhijit Dharchoudhury, Sung-Mo Kang, Hungse Cha, and Janak H Patel. Fast timing simulation of transient faults in digital circuits. In Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pages 719-722. IEEE Computer Society Press, 1994
6. Mahdi Fazeli, Seyed Ghassem Miremadi, Hossein Asadi, and Mehdi Baradaran Tahoori. A fast analytical approach to multi-cycle soft error rate estimation of sequential circuits. In 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD), 2010, pages 797-800. IEEE, 2010
7. Daniel Holcomb,Wenchao Li, and Sanjit A Seshia. Design as you see FIT: Systemlevel soft error analysis of sequential circuits. In Proceedings of the Conference on Design, Automation and Test in Europe, pages 785-790. European Design and Automation Association, 2009
8. Régis Leveugle, A Calvez, Paolo Maistri, and Pierre Vanhauwaert. Statistical Fault Injection: quantified error and confidence. In Design, Automation &Test in Europe Conference &Exhibition, 2009. DATE'09., pages 502-506. IEEE, 2009
9. Xiaodong Li, Sarita V Adve, Pradip Bose, and Jude A Rivers. SoftArch: an architecture-level tool for modeling and analyzing soft errors. In Proceedings of International Conference on Dependable Systems and Networks, 2005, pages 496-505. IEEE, 2005
10. Shahrzad Mirkhani, Jacob A Abraham, Toai Vo, Hongshin Jun, and Bill Eklow. FALCON: Rapid statistical fault coverage estimation for complex designs. In IEEE International Test Conference (ITC), 2012, pages 1-10. IEEE, 2012
11. Shubhendu S Mukherjee, Joel Emer, and Steven K Reinhardt. The soft error problem: An architectural perspective. In 11th International Symposium on High-Performance Computer Architecture, 2005. HPCA-11., pages 243-247. IEEE, 2005
12. Arun A Nair, Lizy Kurian John, and Lieven Eeckhout. AVF stressmark: Towards an automated methodology for bounding the worst-case vulnerability to soft errors. In 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2010, pages 125-136. IEEE, 2010
13. Andrea Pellegrini, Kypros Constantinides, Dan Zhang, Shobana Sudhakar, Valeria Bertacco, and Todd Austin. CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework. In IEEE International Conference on Computer Design, 2008. ICCD 2008., pages 363-370. IEEE, 2008
14. Heather M Quinn, Dolores A Black, William H Robinson, and Stephen P Buchner. Fault simulation and emulation tools to augment radiation-hardness assurance testing. IEEE Transactions on Nuclear Science, 60(3):2119-2142, 2013
15. Krishnan Ramakrishnan, R Rajaramant, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin, and Kenan Unlu. Hierarchical soft error estimation tool (HSEET). In 9th International Symposium on Quality Electronic Design, 2008. ISQED 2008., pages 680-683. IEEE, 2008
16. Pia N Sanda, Jeffrey W Kellington, Prabhakar Kudva, Ronald Kalla, Ryan B Mc-Beth, Jerry Ackaret, Ryan Lockwood, John Schumann, and Christopher R Jones. Soft-error resilience of the IBM POWER6 processor. IBM Journal of Research and Development, 52(3):275-284, 2008
17. Nicholas J Wang, Justin Quek, Todd M Rafacz, and Sanjay J Patel. Characterizing the effects of transient faults on a high-performance processor pipeline. In International Conference on Dependable Systems and Networks (DSN), 2004, pages 61-70. IEEE, 2004
18. Xin Xu and Man-Lap Li. Understanding soft error propagation using efficient vulnerability-driven fault injection. In 42nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), 2012, pages 1-12. IEEE, 2012.