Dataflow formalisation of real-time streaming applications on a Composable and Predictable Multi-Processor SOC

Journal of Systems Architecture

Volumn 61, Issue 9, 2015, Pages 435-448

  Nelson, Andrew ^a   Goossens, Kees ^a   Akesson, Benny ^b  

^a EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b CZECH TECHNICAL UNIVERSITY IN PRAGUE   (Czech Republic)

Author keywords

Dataflow; GALS; Mixed time criticality; Multi processor; Performance analysis; Real time

Indexed keywords

APPLICATION PROGRAMS; ASYNCHRONOUS SEQUENTIAL LOGIC; DATA FLOW ANALYSIS; DYNAMIC RANDOM ACCESS STORAGE; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MULTIPROCESSING SYSTEMS; NETWORK-ON-CHIP; PROGRAMMABLE LOGIC CONTROLLERS; STATIC RANDOM ACCESS STORAGE; SYSTEM-ON-CHIP; VLSI CIRCUITS;

DATAFLOW; GALS; MULTI-PROCESSORS; PERFORMANCE ANALYSIS; REAL TIME;

REAL TIME SYSTEMS;

EID: 84944276528     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sysarc.2015.04.001     Document Type: Article

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