Bounding WCET of applications using SDRAM with priority based budget scheduling in MPSoCs

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2012, Pages 665-670

  Shah, Hardik ^a   Raabe, Andreas ^a   Knoll, Alois ^b  

^a FORTISS GMBH   (Germany)

^b TECHNICAL UNIVERSITY OF MUNICH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ACCIDENT PREVENTION; AUTOMATION; BUDGET CONTROL; SCHEDULING; SOFTWARE ARCHITECTURE; STATIC RANDOM ACCESS STORAGE; SYSTEM-ON-CHIP;

ACCESS PATTERNS; ALTERA CYCLONES; APPLICATION ACCESSING; ESTIMATION TECHNIQUES; INDUSTRIAL AUTOMATION; MULTICORE ARCHITECTURES; SAFETY CRITICAL APPLICATIONS; WORST-CASE EXECUTION TIME;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 84862114407     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2012.6176554     Document Type: Conference Paper

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