Architecture-parametric timing analysis

Real-Time Technology and Applications - Proceedings

Volumn 2014-October, Issue October, 2014, Pages 189-200

  Reineke, Jan ^a   Doerfert, Johannes ^a  

^a SAARLAND UNIVERSITY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ENERGY UTILIZATION; TIMING CIRCUITS;

ARCHITECTURAL PARAMETERS; IMPLEMENTATION COST; INSTRUCTION SET ARCHITECTURE; MEMORY LATENCIES; MEMORY SIZE; MICRO ARCHITECTURES; TIMING ANALYSIS;

MEMORY ARCHITECTURE;

EID: 84937558406     PISSN: 10801812     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTAS.2014.6926002     Document Type: Conference Paper

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