Parametric timing analysis for complex architectures

Proceedings - 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2008

Volumn , Issue , 2008, Pages 367-376

  Altmeyer, Sebastian ^a   Lisper, Björn ^b   Hümbert, Christian ^c   Wilhelm, Reinhard ^a  

^a SAARLAND UNIVERSITY   (Germany)

^b MÄLARDALEN UNIVERSITY   (Sweden)

^c AbsInt GmbH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPLEX ARCHITECTURES; DESIGN TIME; EXECUTION TIME; HARD REAL-TIME SYSTEMS; INTERNATIONAL CONFERENCES; LOOP BOUNDS; NUMERIC VALUES; PARAMETRIC TIMING ANALYSIS; REAL-TIME COMPUTING SYSTEMS; RUN-TIME; TIMING ANALYSIS; TIMING CONSTRAINTS; UPPER BOUNDS; WORST-CASE EXECUTION TIME;

COMPUTER SYSTEMS; EMBEDDED SYSTEMS; PROGRAM PROCESSORS; STRUCTURED PROGRAMMING; TIME MEASUREMENT; TIMING CIRCUITS;

REAL TIME SYSTEMS;

EID: 53549107221     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTCSA.2008.7     Document Type: Conference Paper

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