CLU: Co-optimizing locality and utility in thread-aware capacity management for shared last level caches

IEEE Transactions on Computers

Volumn 63, Issue 7, 2014, Pages 1656-1667

  Zhan, Dongyuan ^a   Jiang, Hong ^a   Seth, Sharad C ^a  

^a UNIVERSITY OF NEBRASKA LINCOLN   (United States)

Author keywords

Capacity management; chip multiprocessors; locality and utility co optimization; shared last level caches

Indexed keywords

MICROPROCESSOR CHIPS;

ANALYSIS AND EVALUATION; CACHE PARTITIONING; CAPACITY MANAGEMENT; CHIP MULTIPROCESSOR; CO-OPTIMIZATION; EXECUTION-DRIVEN SIMULATION; LAST-LEVEL CACHES; LEAST RECENTLY USED;

CURVE FITTING;

EID: 84903639864     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2012.277     Document Type: Article

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