-
2
-
-
33747035782
-
Hashing in Practice, Analysis of Hashing and Universal Hashing
-
M.V. Ramakrishna, "Hashing in Practice, Analysis of Hashing and Universal Hashing," Proc. ACM SIGMOD Conf., pp. 191-199, 1988.
-
(1988)
Proc. ACM SIGMOD Conf.
, pp. 191-199
-
-
Ramakrishna, M.V.1
-
3
-
-
0018456171
-
Universal Classes of Hashing Functions
-
L. Carter and M. Wegman, "Universal Classes of Hashing Functions," J. Computer and System Sciences, vol. 18, no. 2, pp. 143-154, 1979.
-
(1979)
J. Computer and System Sciences
, vol.18
, Issue.2
, pp. 143-154
-
-
Carter, L.1
Wegman, M.2
-
4
-
-
33747079449
-
Resetting Storage Unit Directories
-
M. Benhase, "Resetting Storage Unit Directories," IBM Technical Disclosure Bulletin, vol. 25, no. 7B, pp. 3,760-3,761, 1982.
-
(1982)
IBM Technical Disclosure Bulletin
, vol.25
, Issue.7 B
-
-
Benhase, M.1
-
5
-
-
33747044299
-
Hashing Addresses to a Cache on DASD
-
H. Robinson and G. Taylor, "Hashing Addresses to a Cache on DASD," IBM Technical Disclosure Bulletin, vol. 24, no. 11A, pp. 5,354-5,356, 1982.
-
(1982)
IBM Technical Disclosure Bulletin
, vol.24
, Issue.11 A
-
-
Robinson, H.1
Taylor, G.2
-
6
-
-
0021411896
-
Extendible Hashing for Line-Oriented Paging Stores
-
R. Bryant, "Extendible Hashing for Line-Oriented Paging Stores," IBM Technical Disclosure Bulletin, vol. 26, no. 11, pp. 6,046-6,049, 1984.
-
(1984)
IBM Technical Disclosure Bulletin
, vol.26
, Issue.11
-
-
Bryant, R.1
-
7
-
-
0019622281
-
Hardware Address Translation for Machines with a Large Virtual Memory
-
K. Ramamoganarao and R. Sacks-Davis, "Hardware Address Translation for Machines with a Large Virtual Memory," Information Processing Letters, vol. 13, no. 1, pp. 23-29, 1981.
-
(1981)
Information Processing Letters
, vol.13
, Issue.1
, pp. 23-29
-
-
Ramamoganarao, K.1
Sacks-Davis, R.2
-
9
-
-
33747076251
-
Virtual to Real Address Translation Using Hashing
-
J. Cocke and W. Worley, "Virtual to Real Address Translation Using Hashing," IBM Technical Disclosure Bulletin, vol. 24, no. 6, pp. 2,724-2,726, 1981.
-
(1981)
IBM Technical Disclosure Bulletin
, vol.24
, Issue.6
-
-
Cocke, J.1
Worley, W.2
-
10
-
-
0023961031
-
801 Storage: Architecture and Programming
-
A. Chang and M. Mergen, "801 Storage: Architecture and Programming," ACM Trans. Computer Systems, vol. 6, no. 1, pp. 28-50, 1988.
-
(1988)
ACM Trans. Computer Systems
, vol.6
, Issue.1
, pp. 28-50
-
-
Chang, A.1
Mergen, M.2
-
11
-
-
0027271324
-
Architectural Support for Translation Table Management in Large Address Space Machine
-
May
-
J. Huck and J. Hays, "Architectural Support for Translation Table Management in Large Address Space Machine," Proc. 20th Int'l Symp. Computer Architecture, pp. 39-50, May 1993.
-
(1993)
Proc. 20th Int'l Symp. Computer Architecture
, pp. 39-50
-
-
Huck, J.1
Hays, J.2
-
12
-
-
0019552967
-
Expected Length of the Longest Probe Sequence in Hash Code Searching
-
G. Gonnet, "Expected Length of the Longest Probe Sequence in Hash Code Searching," J. ACM, vol. 28, no. 2, pp. 289-304, 1981.
-
(1981)
J. ACM
, vol.28
, Issue.2
, pp. 289-304
-
-
Gonnet, G.1
-
13
-
-
0020167308
-
Expected Worst-Case Performance of Hash Files
-
P. Larson, "Expected Worst-Case Performance of Hash Files," The Computer J., vol. 25, no. 3, pp. 347-352, 1982.
-
(1982)
The Computer J.
, vol.25
, Issue.3
, pp. 347-352
-
-
Larson, P.1
-
14
-
-
33747036610
-
Efficient Hardware Hashing Design for High Performance Computers
-
Computer Science Dept., RMIT, Melbourne, Australia
-
M.V. Ramakrishna, E. Fu, and E. Bahcekapili, "Efficient Hardware Hashing Design for High Performance Computers," Technical Report TR-96-13, Computer Science Dept., RMIT, Melbourne, Australia, 1996.
-
(1996)
Technical Report TR-96-13
-
-
Ramakrishna, M.V.1
Fu, E.2
Bahcekapili, E.3
|