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Volumn 46, Issue 12, 1997, Pages 1378-1381

Efficient hardware hashing functions for high performance computers

Author keywords

Hashing in hardware; High performance computer architecture; High speed information storage and retrieval; Page address translation; Signature functions

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SIMULATION; INFORMATION RETRIEVAL SYSTEMS; LOGIC CIRCUITS; MATHEMATICAL MODELS; REAL TIME SYSTEMS;

EID: 0031366315     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.641938     Document Type: Article
Times cited : (159)

References (15)
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    • May
    • J. Huck and J. Hays, "Architectural Support for Translation Table Management in Large Address Space Machine," Proc. 20th Int'l Symp. Computer Architecture, pp. 39-50, May 1993.
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    • Expected Length of the Longest Probe Sequence in Hash Code Searching
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  • 14
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    • Efficient Hardware Hashing Design for High Performance Computers
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.