-
1
-
-
77955114639
-
Introduction to the wire-speed processor and architecture
-
Jan.
-
H. Franke et al, "Introduction to the wire-speed processor and architecture", IBM Journal of Research and Development, vol. 54, no. 1, pp. 3:1-3:11, Jan. 2010.
-
(2010)
IBM Journal of Research and Development
, vol.54
, Issue.1
, pp. 31-311
-
-
Franke, H.1
-
2
-
-
49249086142
-
Larrabee: A many-core x86 architecture for visual computing
-
Aug.
-
L. Seiler et al, "Larrabee: A Many-Core x86 Architecture for Visual Computing", ACM Transactions on Graphics, vol. 27, no. 3, p. 1, Aug. 2008.
-
(2008)
ACM Transactions on Graphics
, vol.27
, Issue.3
, pp. 1
-
-
Seiler, L.1
-
4
-
-
51549087415
-
Run-time instruction set selection in a transmutable embedded processor
-
L. Bauer, M. Shafique, and J. Henkel, "Run-Time Instruction Set Selection in a Transmutable Embedded Processor", in Design Automation Conference (DAC), 2008, pp. 56-61.
-
(2008)
Design Automation Conference (DAC)
, pp. 56-61
-
-
Bauer, L.1
Shafique, M.2
Henkel, J.3
-
5
-
-
84863543742
-
Architecture Support for Accelerator-Rich CMPs
-
J. Cong et al., "Architecture Support for Accelerator-Rich CMPs", in Design Automation Conference, 2012, pp. 843-849.
-
(2012)
Design Automation Conference
, pp. 843-849
-
-
Cong, J.1
-
6
-
-
0345382713
-
Domain-specific codesign for embedded security
-
Apr.
-
P. Schaumont and I. Verbauwhede, "Domain-specific codesign for embedded security", Computer, vol. 36, no. 4, pp. 68-74, Apr. 2003.
-
(2003)
Computer
, vol.36
, Issue.4
, pp. 68-74
-
-
Schaumont, P.1
Verbauwhede, I.2
-
7
-
-
77954995378
-
Understanding sources of inefficiency in general-purpose chips
-
R. Hameed et al., "Understanding sources of inefficiency in general-purpose chips", International Symposium on Computer Architecture, p. 37, 2010.
-
(2010)
International Symposium on Computer Architecture
, pp. 37
-
-
Hameed, R.1
-
8
-
-
84863550559
-
-
Tech. Rep
-
"ITRS 2007 System Driver", Tech. Rep. [Online]. Available: http://www.itrs.net
-
ITRS 2007 System Driver
-
-
-
10
-
-
84857883486
-
The accelerator store: A shared memory framework for accelerator-based systems
-
Jan.
-
M. J. Lyons, M. Hempstead, G.-Y. Wei, and D. Brooks, "The Accelerator Store: A Shared Memory Framework For Accelerator-Based Systems", ACM Transactions on Architecture and Code Optimization, vol. 8, no. 4, pp. 1-22, Jan. 2012.
-
(2012)
ACM Transactions on Architecture and Code Optimization
, vol.8
, Issue.4
, pp. 1-22
-
-
Lyons, M.J.1
Hempstead, M.2
Wei, G.-Y.3
Brooks, D.4
-
12
-
-
54949142209
-
A computation- and communication-infrastructure for modular special instructions in a dynamically reconfigurable processor
-
L. Bauer, M. Shafique, and J. Henkel, "A computation- and communication-infrastructure for modular special instructions in a dynamically reconfigurable processor", in International Conference on Field Programmable Logic and Applications (FPL), 2008, pp. 203-208.
-
(2008)
International Conference on Field Programmable Logic and Applications (FPL)
, pp. 203-208
-
-
Bauer, L.1
Shafique, M.2
Henkel, J.3
-
13
-
-
84862328694
-
Enhancing effective throughput for transmission line-based bus
-
Sep.
-
A. Carpenter et al., "Enhancing effective throughput for transmission line-based bus", in International Symposium on Computer Architecture, vol. 40, no. 3, Sep. 2012, pp. 165-176.
-
(2012)
International Symposium on Computer Architecture
, vol.40
, Issue.3
, pp. 165-176
-
-
Carpenter, A.1
-
14
-
-
34547471544
-
Design tradeoffs for tiled CMP on-chip networks
-
DOI 10.1145/1183401.1183430, Proceedings of the 20th Annual International Conference on Supercomputing, ICS 2006
-
J. Balfour and W. J. Dally, "Design tradeoffs for tiled CMP onchip networks", in International Conference on Supercomputing, 2006, pp. 187-198. (Pubitemid 47168505)
-
(2006)
Proceedings of the International Conference on Supercomputing
, pp. 187-198
-
-
Balfour, J.1
Dally, W.J.2
-
15
-
-
84862915062
-
ATree-based topology synthesis for on-chip network
-
Nov.
-
J. Cong, Y. Huang, and B. Yuan, "ATree-based topology synthesis for on-chip network", in International Conference on Computer-Aided Design, Nov. 2011, pp. 651-658.
-
(2011)
International Conference on Computer-Aided Design
, pp. 651-658
-
-
Cong, J.1
Huang, Y.2
Yuan, B.3
-
16
-
-
64949130713
-
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
-
Feb.
-
R. Das et al., "Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs", in International Symposium on High Performance Computer Architecture, Feb. 2009, pp. 175-186.
-
(2009)
International Symposium on High Performance Computer Architecture
, pp. 175-186
-
-
Das, R.1
-
17
-
-
79953076698
-
High-level synthesis for FPGAs: From prototyping to deployment
-
Apr.
-
J. Cong et al., "High-Level Synthesis for FPGAs: From Prototyping to Deployment", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 30, no. 4, pp. 473-491, Apr. 2011.
-
(2011)
IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems
, vol.30
, Issue.4
, pp. 473-491
-
-
Cong, J.1
-
18
-
-
0033686423
-
Generating highlyroutable sparse crossbars for PLDs
-
G. Lemieux, P. Leventis, and D. Lewis, "Generating highlyroutable sparse crossbars for PLDs", in International Symposium on Field Programmable Gate Arrays, 2000, pp. 155-164.
-
(2000)
International Symposium on Field Programmable Gate Arrays
, pp. 155-164
-
-
Lemieux, G.1
Leventis, P.2
Lewis, D.3
-
19
-
-
79953656477
-
Customizable domain-specific computing
-
Mar.
-
J. Cong, V. Sarkar, G. Reinman, and A. Bui, "Customizable Domain-Specific Computing", IEEE Design and Test of Computers, vol. 28, no. 2, pp. 6-15, Mar. 2011.
-
(2011)
IEEE Design and Test of Computers
, vol.28
, Issue.2
, pp. 6-15
-
-
Cong, J.1
Sarkar, V.2
Reinman, G.3
Bui, A.4
-
20
-
-
84859950069
-
Platform characterization for domain-specific computing
-
Jan.
-
A. Bui, J. Cong, L. Vese, and Y. Zou, "Platform characterization for Domain-Specific Computing", Asia and South Pacific Design Automation Conference, pp. 94-99, Jan. 2012.
-
(2012)
Asia and South Pacific Design Automation Conference
, pp. 94-99
-
-
Bui, A.1
Cong, J.2
Vese, L.3
Zou, Y.4
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