Energy-aware probabilistic multiplier: Design and analysis

Embedded Systems Week 2009 - 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES'09

Volumn , Issue , 2009, Pages 281-290

  Lau, Mark S K ^a   Ling, Keck Voon ^a   Chu, Yun Chung ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Multiplier; Optimization; Probabilistic computation; Voltage scaling

Indexed keywords

ANALYTICAL RESULTS; ARRAY MULTIPLIERS; BASIC PRINCIPLES; COMPUTING DEVICES; DESIGN AND ANALYSIS; DIGITAL IMAGE ENHANCEMENT; ENERGY ASSIGNMENT; ENERGY AWARE; ENERGY CONSUMPTION; ENERGY REQUIREMENTS; GRAPHICS CHIPS; PROBABILISTIC COMPUTATION; RIPPLE CARRY ADDERS; SUBSTANTIAL ENERGY; VOLTAGE-SCALING;

ADDERS; COMPUTER GRAPHICS; ENERGY CONSERVATION; FREQUENCY MULTIPLYING CIRCUITS; PROGRAM COMPILERS;

EMBEDDED SYSTEMS;

EID: 72049102935     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1629395.1629434     Document Type: Conference Paper

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