Design and architectures for dependable embedded systems

Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 9th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS'11

Volumn , Issue , 2011, Pages 69-78

  Henkel, Jörg ^a   Bauer, Lars ^a   Becker, Joachim ^a   Bringmann, Oliver ^a   Brinkschulte, Uwe ^a   Chakraborty, Samarjit ^a   Engel, Michael ^a   Ernst, Rolf ^a   Härtig, Hermann ^a   Hedrich, Lars ^a   Herkersdorf, Andreas ^a   Kapitza, Rüdiger ^a   Lohmann, Daniel ^a   Marwedel, Peter ^a   Platzner, Marco ^a   Rosenstiel, Wolfgang ^a   Schlichtmann, Ulf ^a   Spinczyk, Olaf ^a   Tahoori, Mehdi ^a   Teich, Jürgen ^a   Wehn, Norbert ^a   Wunderlich, Hans Joachim ^a   more..

^a NONE

Author keywords

Dependability; Embedded systems; Fault tolerance; Mpsocs; Resilience

Indexed keywords

APPLICATIONS SOFTWARE; CO-DESIGNS; DEPENDABILITY; DEPENDABLE EMBEDDED SYSTEMS; DESIGN PROCESS; GATE LEVELS; LEVELS OF ABSTRACTION; MPSOCS; RESILIENCE; SYSTEM ARCHITECTURES;

CODES (SYMBOLS); DESIGN; EMBEDDED SOFTWARE; FAULT TOLERANCE;

EMBEDDED SYSTEMS;

EID: 81355136058     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2039370.2039384     Document Type: Conference Paper

References (66)

1. Sani Nassif during the SPP 1500 meeting in Stuttgart, Germany, July 2011.
2. Designing Chips without Guarantees. Design & Test of Computers, IEEE, 27(5):60{67, 2010.
3. R. A. Abdallah and N. R. Shanbhag. Error-Resilient Low-Power Viterbi Decoder Architectures. Signal Processing, IEEE Transactions on, 57(12):4906{4917, 2009.
4. Philip Axer, Maurice Sebastian, and Rolf Ernst. Reliability analysis for MPSoCs with mixed-critical, hard real-time constraints. In Proc. of Int. Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2011.
5. P. Barham, B. Dragovic, K. Fraser, S. Hand, T. Harris, A. Ho, R. Neugebauer, I. Pratt, and A. Warfield. Xen and the art of virtualization. In Proceedings of the 19th ACM symposium on Operating systems principles SOSP '03, pages 164{177, 2003.
6. S. Borkar. Designing reliable systems from unreliable components: The challenges of transistor variability and degradation. Micro, IEEE, 25(6):10{16, 2005.
7. M. A. Breuer. Multi-media applications and imprecise computation. In Proc. 8th Euromicro Conference on Digital System Design, pages 2{7, 2005.
8. S. Chinni and R. Hiremane. Virtual machine device queues. 2007.
9. V. K. Chippa, D. Mohapatra, A. Raghunathan, K. Roy, and S. T. Chakradhar. Scalable effort hardware design: Exploiting algorithmic resilience for energy effciency. In Proc. 47th ACM/IEEE Design Automation Conf. (DAC), pages 555{560, 2010.
10. C. T. Chow, L. S. M. Tsui, P. H. W. Leong, W. Luk, and S. J. E. Wilton. Dynamic voltage scaling for commercial FPGAs. In ICFPT, 2005, pages 173{180, 2005.
11. Ayse Kivilcim Coskun, Tajana Šimunic Rosing, Keith A. Whisnant, and Kenny C. Gross. Static and dynamic temperature-aware scheduling for multiprocessor SoCs. IEEE Trans. Very Large Scale Integr. Syst., 16:1127{1140, 2008.
12. P. Dubey. Recognition, Mining and Synthesis Moves Computers to the Era of Tera. Technology@Intel Magazine, pages 1{8, 2005.
13. Thomas Ebi, David Kramer, Wolfgang Karl, and Jörg Henkel. Economic learning for thermal-aware power budgeting in many-core architectures. In Proc. 9th Intl. Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2011.
14. Thomas Ebi, Holm Rauchfuss, Andreas Herkersdorf, and Jörg Henkel. Agent-based thermal management using real-time I/O communication relocation for 3D many-cores. In International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pages 112{121, 2011.
15. S. Eisenhardt, A. Küster, T. Schweizer, T. Kuhn, and W. Rosenstiel. Runtime datapath remapping for fault-tolerant coarse-grained reconfigurable architectures. In International Workshop on Recon-gurable Communication-centric Systems-on-Chip (ReCoSoC), 2011.
16. S. Eisenhardt, A. Küster, T. Schweizer, T. Kuhn, and W. Rosenstiel. Spatial and temporal data path remapping for fault-tolerant coarse-grained reconfigurable architectures. In IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2011. accepted to be published.
17. Michael Engel, Florian Schmoll, Andreas Heinig, and Peter Marwedel. Temporal Properties of Error Handling for Multimedia Applications. In Proceedings of the 14th ITG Conference on Electronic Media Technology, 2011.
18. European Nanoelectronics Initiative Advisory Council. Eniac strategic research agenda - european technology platform nanoelectronics. Second Edition, 2007.
19. Andreas Heinig, Michael Engel, Florian Schmoll, and Peter Marwedel. Improving Transient Memory Fault Resilience of an H.264 Decoder. In Proceedings of the Workshop on Embedded Systems for Real-time Multimedia (ESTIMedia), 2010.
20. Andreas Heinig, Michael Engel, Florian Schmoll, and Peter Marwedel. Using Application Knowledge to Improve Embedded Systems Dependability. In Proceedings of the Workshop on Hot Topics in System Dependability (HotDep), 2010.
21. Rafik Henia, Arne Hamann, Marek Jersak, Razvan Racu, Kai Richter, and Rolf Ernst. System level performance analysis - the SymTA/S approach. IEE Proceedings Computers and Digital Techniques, 2005.
22. W.-L. Hung, G. M. Link, Yuan Xie, N. Vijaykrishnan, and M. J. Irwin. Interconnect and thermal-aware oorplanning for 3d microprocessors. In Proceedings of the 7th International Symposium on Quality Electronic Design (ISQED), pages 98{104, 2006.
23. International Electrotechnical Commission (IEC). Functional safety of electrical/electronic/programmable electronic safety-related systems, 1998.
24. Phillip H. Jones, Young H. Cho, and John W. Lockwood. Dynamically optimizing FPGA applications by monitoring temperature and workloads. In VLSI Design. Held jointly with 6th International Conference on Embedded Systems., 20th International Conference on, pages 391{400, 2007.
25. A. Khajeh, Minyoung Kim, N. Dutt, A. M. Eltawil, and F. J. Kurdahi. Cross-layer co-exploration of exploiting error resilience for video over wireless applications. In Proc. IEEE/ACM/IFIP Workshop Embedded Systems for Real-Time Multimedia ESTImedia, pages 13{18, 2008.
26. Veit B. Kleeberger, Sebastian Kiesel, Ulf Schlichtmann, and Samarjit Chakraborty. Program-Aware Circuit Level Timing Analysis. In International Symposium on Integrated Circuits (ISIC), 2011. To appear.
27. C. LaFrieda, E. Ipek, J. F. Martinez, and R. Manohar. Utilizing dynamically coupled cores to form a resilient chip multiprocessor. In Proc. of Int. Conf. Dependable Systems and Networks, pages 317{326, 2007.
28. L. Leem, Hyungmin Cho, J. Bau, Q. A. Jacobson, and S. Mitra. ERSA: Error Resilient System Architecture for probabilistic applications. In Proc. Design, Automation & Test in Europe Conf. & Exhibition (DATE), pages 1560{1565, 2010.
29. Daniel Lohmann, Wanja Hofer, Wolfgang Schröder-Preikschat, Jochen Streicher, and Olaf Spinczyk. CiAO: An aspect-oriented operating-system family for resource-constrained embedded systems. In Proceedings of the USENIX Annual Technical Conference, pages 215{228, 2009.
30. Enno Ludie;bbers and Marco Platzner. ReconOS: Multithreaded programming for recon-gurable computers. ACM Trans. Embed. Comput. Syst., 9:8:1{8:33, 2009.
31. M. Glaβ, M. Lukasiewycz, F. Reimann, C. Haubelt, and J. Teich. Symbolic system level reliability analysis. In Proceedings of the 2010 International Conference on Computer-Aided Design (ICCAD), pages 185{189.
32. M. May, M. Alles, and N. Wehn. A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder. In Proc. Design, Automation and Test in Europe (DATE), pages 456{461, 2008.
33. M. May, N. Wehn, A. Bouajila, J. Zeppenfeld, W. Stechele, A. Herkersdorf, D. Ziener, and J. Teich. A Rapid Prototyping System for Error-Resilient Multi-Processor Systems-on-Chip. In Proc. Design, Automation and Test in Europe (DATE), pages 375{380, 2010.
34. S. Mitra, K. Brelsford, Young Moon Kim, Hsiao-Heng Kelin Lee, and Yanjing Li. Robust System Design to Overcome CMOS Reliability Challenges. Emerging and Selected Topics in Circuits and Systems, IEEE Journal on, 1(1):30{41, 2011.
35. S. Mitra, K. Brelsford, and P. N. Sanda. Cross-layer resilience challenges: Metrics and optimization. In Proc. Design, Automation & Test in Europe Conf. & Exhibition (DATE), pages 1029{1034, 2010.
36. Debabrata Mohapatra, Georgios Karakonstantis, and Kaushik Roy. Significance driven computation: a voltage-scalable, variation-aware, quality-tuning motion estimator. In Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design, ISLPED, pages 195{200, 2009.
37. Gordon E. Moore. No exponential is forever: but "forever" can be delayed! [semiconductor industry]. In Solid-State Circuits Conference. Digest of Technical Papers (ISSCC), pages 20{23, vol.1, 2003.
38. F. Mulas, D. Atienza, A. Acquaviva, S. Carta, L. Benini, and G. De Micheli. Thermal balancing policy for multiprocessor stream computing platforms. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, 28(12):1870 {1882, 2009.
39. Krishna V. Palem. Energy aware algorithm design via probabilistic computing: from algorithms and models to moore's law and novel (semiconductor) devices. In Proceedings of the international conference on Compilers, architecture and synthesis for embedded systems, CASES, pages 113{116, 2003.
40. D.K. Pradhan. Fault-tolerant computer system design. Prentice-Hall, Inc., 1996.
41. Semeen Rehman, Muhammad Shafique, Florian Kriebel, and Jörg Henkel. Reliable software for unreliable hardware: Embedded code generation aiming at reliability. In Proc. 9th Intl. Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2011.
42. Semeen Rehman, Muhammad Shafique, Florian Kriebel, and Jo&deirg Henkel. ReVC: Computationally reliable video coding on unreliable hardware platforms: A case study on error-tolerant H.264/AVC CAVLC entropy coding. In Proc. 18th International Conference on Image Processing (ICIP), 2011.
43. Michael Roitzsch and Martin Pohlack. Video quality and system resources: Scheduling two opponents. J. Vis. Commun. Image Represent., 19:473{488, 2008.
44. B. Sander, J. Schnerr, and O. Bringmann. ESL power analysis of embedded processors for temperature and reliability estimations. In Proc. 7th Intl. Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pages 239{248, 2009.
45. Horst Schirmeier, Rüdiger Kapitza, Daniel Lohmann, and Olaf Spinczyk. DanceOS: Towards dependability aspects in configurable embedded operating systems. In Proceedings of the 3rd HiPEAC Workshop on Design for Reliability (DFR), pages 21{26, 2011.
46. Naresh R. Shanbhag, Rami A. Abdallah, Rakesh Kumar, and Douglas L. Jones. Stochastic computation. In Proc. 47th ACM/IEEE Design Automation Conf. (DAC), pages 859{864, 2010.
47. S.K. Shukla and R.I. Bahar. Nano, quantum and molecular computing: implications to high level design and validation. Solid Mechanics and Its Applications Series. Kluwer Academic Publishers, 2004.
48. D.P. Siewiorek and R.S. Swarz. Reliable computer systems: design and evaluation, volume 2. Digital Press, 1992.
49. J. C. Smolens, B. T. Gold, J. Kim, B. Falsafi, J. C. Hoe, and A. G. Nowatryk. Fingerprinting: bounding soft-error-detection latency and bandwidth. 24(6):22{29, 2004.
50. Olaf Spinczyk and Daniel Lohmann. The design and implementation of AspectC++. Knowledge-Based Systems, Special Issue on Techniques to Produce Intelligent Secure Software, 20(7):636{651, 2007.
51. J. von Neumann. Probabilistic logics and synthesis of reliable organisms from unreliable components. In Automata Studies, pages 43{98, 1956.
52. P. Willmann, J. Shafer, D. Carr, A. Menon, S. Rixner, A.L. Cox, and W. Zwaenepoel. Concurrent direct network access for virtual machine monitors. In Proceedings of the 13th International Symposium on High Performance Computer Architecture, pages 306{317. Citeseer, 2007.
53. Xiuyi Zhou, Jun Yang, Yi Xu, Youtao Zhang, and Jianhua Zhao. Thermal-aware task scheduling for 3d multicore processors. IEEE Trans. Parallel Distrib. Syst., 21:60{71, 2010. | SPP1500 - http://spp1500.itec.kit.edu/|.
54. Joachim Becker. Runtime Reconfigurable Analog Circuits and Adaptive Filter Synthesis for Compensation of Unreliable Hardware Constraints (hexFPAA).
55. Uwe Brinkschulte and Lars Hedrich. MixedCoreSoC: A Highly Dependable Self-Adaptive Mixed-Signal Multi-Core System-on-Chip (MixedCoreSoC).
56. Samarjit Chakraborty and Ulf Schlichtmann. Lifting Device-Level Characteristics for Error Resilient System Level Design: A Crosslayer Approach (LIFT).
57. Rolf Ernst and Hermann Härtig. ASTEROID - An Analyzable, Resilient, Embedded Real-Time Operating System Design (ASTEROID).
58. Jo¨rg Henkel and Andreas Herkersdorf. VirTherm-3D Communication Virtualization Enabling Thermal Management for Dependable 3D Many-Cores (VirTherm-3D).
59. Jörg Henkel and Hans-Joachim Wunderlich. OTERA: Online Test Strategies for Reliable Reconfigurable Architectures (OTERA).
60. Rudiger Kapitza, Daniel Lohmann, and Olaf Spinczyk. Dependability Aspects in Configurable Embedded Operating Systems (DanceOS).
61. Peter Marwedel and Michael Engel. Software-Based Error Handling Using Cooperation Between Compilers and Operating Systems (FEHLER).
62. Marco Platzner. Temperature-driven Thread Mapping and Shadowing in Hybrid Multi-Cores (SMASH).
63. Wolfgang Rosenstiel. Self-Adaptive Coarse-Grained Reconfigurable Architectures as Reliability Enhancers in Embedded Systems (ARES).
64. Mehdi Tahoori. Providing Effcient Reliability in Critical Embedded Systems (PERCEDES).
65. Jürgen Teich. Compositional System Level Reliability Analysis in the Presence of Uncertainties (CRAU).
66. Norbert Wehn. Design of E-cient, Dependable VLSI Architectures Based on a Cross-Layer-Reliability Approach Using Wireless Communication as Application (MIMODeS).