Analysis of instruction-level vulnerability to dynamic voltage and temperature variations

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2012, Pages 1102-1105

  Rahimi, Abbas ^a   Benini, Luca ^b   Gupta, Rajesh K ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

EQUIVALENCE CLASSES;

COMPUTING SYSTEM; DELAY VARIATION; DYNAMIC VOLTAGE; INSTRUCTION-LEVEL; OPERATING CONDITION; POWER VARIATIONS; SOFTWARE STACKS; TEMPERATURE VARIATION;

TEMPERATURE DISTRIBUTION;

EID: 84862068210     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2012.6176659     Document Type: Conference Paper

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