Run-time mapping for reliable many-cores based on energy/performance trade-offs

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 2013, Pages 58-64

  Bolchini, C ^a   Carminati, M ^a   Miele, A ^a   Das, A ^b   Kumar, A ^b   Veeravalli, B ^b  

^a POLITECNICO DI MILANO   (Italy)

^b NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

COMMUNICATION ENERGY; COMMUNICATION ENERGY CONSUMPTION; ENERGY OPTIMIZATION; MANY-CORE ARCHITECTURE; OPTIMIZATION GOALS; PROCESSING NODES; RESOURCE MANAGERS; SYSTEM RELIABILITY;

COMMUNICATION; COMPUTER ARCHITECTURE; DEFECTS; ENERGY UTILIZATION; ENGINES; FAULT TOLERANCE; NANOTECHNOLOGY; OPTIMIZATION;

MAPPING;

EID: 84891307121     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFT.2013.6653583     Document Type: Conference Paper

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