Modeling and design guidelines for P+ guard rings in lightly doped CMOS substrates

IEEE Transactions on Electron Devices

Volumn 60, Issue 9, 2013, Pages 2854-2861

  Shen, Ming ^a   Mikkelsen, Jan Hvolgaard ^a   Zhang, Ke ^b   Jensen, Ole Kiel ^a   Tian, Tong ^b   Larsen, Torben ^a  

^a AALBORG UNIVERSITY   (Denmark)

^b SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY   (China)

Author keywords

Compact model; guard ring; mixed signal IC; P + contact; P well; substrate noise

Indexed keywords

COMPACT MODEL; GUARD-RINGS; MIXED-SIGNAL IC; P-WELL; SUBSTRATE NOISE;

CMOS INTEGRATED CIRCUITS; CONFORMAL MAPPING; DESIGN; ELECTRIC SIGNAL SYSTEMS; SCATTERING PARAMETERS; SPURIOUS SIGNAL NOISE;

SUBSTRATES;

EID: 84883310382     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2013.2275177     Document Type: Article

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