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Volumn 51, Issue 5, 2004, Pages 817-819

Substrate noise-coupling characterization and efficient suppression in CMOS technology

Author keywords

Deep n well (DNW); Guard ring (GR); Radio frequency (RF); Substrate noise coupling

Indexed keywords

CAPACITANCE; GATES (TRANSISTOR); SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR JUNCTIONS; SPURIOUS SIGNAL NOISE; SUBSTRATES;

EID: 2442530854     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.825814     Document Type: Article
Times cited : (41)

References (10)
  • 3
    • 0031363696 scopus 로고    scopus 로고
    • Silicon RF-CMOS IC technology for RF mixed-mode wireless receiver
    • J. Ma, "Silicon RF-CMOS IC technology for RF mixed-mode wireless receiver," in Proc. RFIC Symp., 1997, pp. 175-179.
    • Proc. RFIC Symp., 1997 , pp. 175-179
    • Ma, J.1
  • 5
    • 0035274550 scopus 로고    scopus 로고
    • Measuring and modeling the effects of substrate noise on the LNA for a CMOS GPS receiver
    • Apr.
    • M. Xu, D. K. Su, D.-K. Shaeffer, T.-H. Lee, and B.-A. Wooley, "Measuring and modeling the effects of substrate noise on the LNA for a CMOS GPS receiver," IEEE J. Solid-State Circuits, vol. 36, pp. 473-485, Apr. 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , pp. 473-485
    • Xu, M.1    Su, D.K.2    Shaeffer, D.-K.3    Lee, T.-H.4    Wooley, B.-A.5
  • 6
    • 0027576336 scopus 로고
    • Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits
    • Aug.
    • D. K. Su, M.-J. Loinaz, S. Masui, and B.-A. Wooley, "Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits," IEEE, J. Solid-State. Circuits, vol. 28, pp. 420-430, Aug. 1993.
    • (1993) IEEE, J. Solid-State. Circuits , vol.28 , pp. 420-430
    • Su, D.K.1    Loinaz, M.-J.2    Masui, S.3    Wooley, B.-A.4
  • 7
    • 0029342036 scopus 로고
    • Comparison of SOI and junction isolation for substrate crosstalk suppression in mixed mode integrated circuits
    • K. Joardar, "Comparison of SOI and junction isolation for substrate crosstalk suppression in mixed mode integrated circuits," Electron. Lett., vol. 31, no. 15, pp. 1230-1231, 1995.
    • (1995) Electron. Lett. , vol.31 , Issue.15 , pp. 1230-1231
    • Joardar, K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.