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Volumn 1, Issue 2, 2011, Pages 220-233

Modeling and analysis of through-silicon via (TSV) noise coupling and suppression using a guard ring

Author keywords

Guard ring; measurement; noise coupling model; noise coupling suppression; noise isolation; noise transfer function; shielding structure; substrate noise; three dimensional integrated circuit (3D IC); through silicon via (TSV)

Indexed keywords

GUARD-RINGS; NOISE COUPLING; NOISE ISOLATION; NOISE TRANSFER FUNCTION; SUBSTRATE NOISE; THREE DIMENSIONAL INTEGRATED CIRCUITS; THROUGH-SILICON VIA;

EID: 80155176733     PISSN: 21563950     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCPMT.2010.2101892     Document Type: Article
Times cited : (163)

References (21)
  • 1
    • 0035860451 scopus 로고    scopus 로고
    • Limits on Silicon nanoelectronics for terascale integration
    • J. D. Meindl, Q. Chen, and J. A. Davis, "Limits on Silicon nanoelectronics for terascale integration," Science, vol. 293, no. 5537, pp. 2044-2049, 2001.
    • (2001) Science , vol.293 , Issue.5537 , pp. 2044-2049
    • Meindl, J.D.1    Chen, Q.2    Davis, J.A.3
  • 3
    • 51249113887 scopus 로고    scopus 로고
    • Electrical characterization of trough silicon via (TSV) depending on structural and material parameters based on 3D full wave simulation
    • Nov
    • J. S. Pak, C. Ryu, and J. Kim, "Electrical characterization of trough silicon via (TSV) depending on structural and material parameters based on 3D full wave simulation," IEEE Proc. Electron. Materials Packag., pp. 1-6, Nov. 2007.
    • (2007) IEEE Proc. Electron. Materials Packag , pp. 1-6
    • Pak, J.S.1    Ryu, C.2    Kim, J.3
  • 5
    • 70449486945 scopus 로고    scopus 로고
    • Reliability study of through-silicon via (TSV) copper filled interconnects
    • Dec
    • A. Kamto, Y. Liu, L. Schaper, and S. L. Burkett, "Reliability study of through-silicon via (TSV) copper filled interconnects," Thin Solid Films, vol. 518, no. 5, pp. 1614-1619, Dec. 2009.
    • (2009) Thin Solid Films , vol.518 , Issue.5 , pp. 1614-1619
    • Kamto, A.1    Liu, Y.2    Schaper, L.3    Burkett, S.L.4
  • 6
    • 77950935728 scopus 로고    scopus 로고
    • Modeling and analysis of coupling between TSVs, metal, and RDL interconnects in TSV-based 3D IC with silicon interposer
    • Dec
    • K. Yoon, G. Kim, W. Lee, T. Song, J. Lee, H. Lee, K. Park, and J. Kim, "Modeling and analysis of coupling between TSVs, metal, and RDL interconnects in TSV-based 3D IC with silicon interposer," in IEEE Proc. Electron. Packag. Technol. Conf., Dec. 2009, pp. 702-706.
    • (2009) IEEE Proc. Electron. Packag. Technol. Conf. , pp. 702-706
    • Yoon, K.1    Kim, G.2    Lee, W.3    Song, T.4    Lee, J.5    Lee, H.6    Park, K.7    Kim, J.8
  • 8
    • 63049119699 scopus 로고    scopus 로고
    • Managing Losses in through Silicon vias with different return current path configurations
    • Dec
    • B. Curran, I. Ndip, S. Guttovski, and H. Reichl, "Managing Losses in through Silicon vias with different return current path configurations," in IEEE Proc. Electron. Packag. Technol. Conf., Dec. 2008, pp. 206-211.
    • (2008) IEEE Proc. Electron. Packag. Technol. Conf. , pp. 206-211
    • Curran, B.1    Ndip, I.2    Guttovski, S.3    Reichl, H.4
  • 12
    • 69549127830 scopus 로고    scopus 로고
    • Modeling and analysis of simultaneous switching noise couplingfor a CMOSnegative-feedback operational amplifier in system-in-package
    • Aug
    • Y. Shim, J. Park, J. Kim, E. Song, J. Yoo, J. S. Pak, and J. Kim, "Modeling and analysis of simultaneous switching noise couplingfor a CMOSnegative-feedback operational amplifier in system-in-package," IEEE Trans. Electromagn. Compatibil., vol. 51, no. 3, pp. 763-773, Aug. 2009.
    • (2009) IEEE Trans. Electromagn. Compatibil , vol.51 , Issue.3 , pp. 763-773
    • Shim, Y.1    Park, J.2    Kim, J.3    Song, E.4    Yoo, J.5    Pak, J.S.6    Kim, J.7
  • 13
    • 77955517903 scopus 로고    scopus 로고
    • Modeling and analysis of power supply noise imbalance on ultra high frequency differential low noise amplifiers in a system-in-package
    • Aug.
    • K. Koo, Y. Shim, C. Yoon, J. Kim, J. Yoo, J. S. Pak, and J. Kim, "Modeling and analysis of power supply noise imbalance on ultra high frequency differential low noise amplifiers in a system-in-package," IEEE Trans. Adv. Packag., vol. 33, no. 3, pp. 602-616, Aug. 2010.
    • (2010) IEEE Trans. Adv. Packag , vol.33 , Issue.3 , pp. 602-616
    • Koo, K.1    Shim, Y.2    Yoon, C.3    Kim, J.4    Yoo, J.5    Pak, J.S.6    Kim, J.7
  • 14
    • 70549084860 scopus 로고    scopus 로고
    • Through-Silicon Via (TSV)-induced noise characterization and noise mitigation using coaxial TSVs
    • Sep
    • N. H. Khan, S. M. Alam, and S. Hassoun, "Through-Silicon Via (TSV)-induced noise characterization and noise mitigation using coaxial TSVs," IEEE Proc. 3D Syst. Integrat., pp. 1-7, Sep. 2009.
    • (2009) IEEE Proc. 3D Syst. Integrat , pp. 1-7
    • Khan, N.H.1    Alam, S.M.2    Hassoun, S.3
  • 18
    • 33947389668 scopus 로고    scopus 로고
    • Substrate noise coupling in SoC design: Modeling, avoidance, and validation
    • Dec
    • A. Afzali-Kusha, M. Nagata, N. K. Verghese, and D. J. Allstot, "Substrate noise coupling in SoC design: Modeling, avoidance, and validation," Proc. IEEE, vol. 94, no. 12, pp. 2109-2138, Dec. 2006.
    • (2006) Proc. IEEE , vol.94 , Issue.12 , pp. 2109-2138
    • Afzali-Kusha, A.1    Nagata, M.2    Verghese, N.K.3    Allstot, D.J.4
  • 19
    • 0033875648 scopus 로고    scopus 로고
    • Physical modeling of spiral inductors on silicon
    • Mar
    • C. P. Yue and S. S. Wong, "Physical modeling of spiral inductors on silicon," IEEE Trans. Electron Devices, vol. 47, no. 3, pp. 560-568, Mar. 2000.
    • (2000) IEEE Trans. Electron Devices , vol.47 , Issue.3 , pp. 560-568
    • Yue, C.P.1    Wong, S.S.2
  • 20
    • 0033896611 scopus 로고    scopus 로고
    • New formulas of interconnect capacitances based on results of conformal mapping method
    • Jan
    • F. Stellari and A. L. Lacaita, "New formulas of interconnect capacitances based on results of conformal mapping method," IEEE Trans. Electron Devices, vol. 47, no. 1, pp. 222-231, Jan. 2000.
    • (2000) IEEE Trans. Electron Devices , vol.47 , Issue.1 , pp. 222-231
    • Stellari, F.1    Lacaita, A.L.2
  • 21
    • 33846097203 scopus 로고    scopus 로고
    • The chip-A design guide for reducing substrate noise coupling in RF applications
    • Sep-Oct
    • A. Helmy and M. Ismail, "The chip-A design guide for reducing substrate noise coupling in RF applications," IEEE Circuits Devices Mag., vol. 22, no. 5, pp. 7-21, Sep.-Oct. 2006.
    • (2006) IEEE Circuits Devices Mag , vol.22 , Issue.5 , pp. 7-21
    • Helmy, A.1    Ismail, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.