SIMD divergence optimization through intra-warp compaction

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2013, Pages 368-379

  Vaidya, Aniruddha S ^a,b   Shayesteh, Anahita ^a   Woo, Dong Hyuk ^a   Saharoy, Roy ^a   Azimi, Mani ^a  

^a INTEL CORPORATION   (United States)

^b NVIDIA   (United States)

Author keywords

Branch divergence; GPU; SIMD

Indexed keywords

BRANCH DIVERGENCE; COMPRESSION TECHNIQUES; DATA-PARALLEL APPLICATIONS; GPU; INSTRUCTION STREAMS; MICRO ARCHITECTURES; MICRO-ARCHITECTURAL OPTIMIZATION; SIMD;

APPLICATION PROGRAMMING INTERFACES (API); COMPACTION; COMPUTER ARCHITECTURE; COMPUTER GRAPHICS; ENERGY EFFICIENCY; OPTIMIZATION;

PROGRAM PROCESSORS;

EID: 84881183039     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2485922.2485954     Document Type: Conference Paper

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