Dynamic warp formation and scheduling for efficient GPU control flow

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn , Issue , 2007, Pages 407-418

  Fung, Wilson W L ^a   Sham, Ivan ^a   Yuan, George ^a   Aamodt, Tor M ^a  

^a UNIVERSITY OF BRITISH COLUMBIA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SYSTEMS; CONCURRENCY CONTROL; GRAPHIC METHODS; HARDWARE; PARALLEL PROCESSING SYSTEMS; PIPELINES; WEAVING;

CONTROL FLOWS; CONTROL HARDWARES; GRAPHICS PROCESSING UNITS (CPUS); HARDWARE IMPLEMENTATIONS; INSTRUCTION SET ARCHITECTURE (ISA); INTERNATIONAL SYMPOSIUM; MICRO ARCHITECTURES; ON THE FLY (OTF); PARALLEL HARDWARE; PROCESSING ELEMENTS (PES); SCALAR THREADS; SIMD PROCESSING;

COMPUTER HARDWARE;

EID: 47349104432     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2007.30     Document Type: Conference Paper

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