ROSE::FTTransform - A source-to-source translation framework for exascale fault-tolerance research

Proceedings of the International Conference on Dependable Systems and Networks

Volumn , Issue , 2012, Pages

  Lidman, Jacob ^a,b   Quinlan, Daniel J ^a   Liao, Chunhua ^a   McKee, Sally A ^b  

^a LAWRENCE LIVERMORE NATIONAL LABORATORY   (United States)

^b CHALMERS UNIVERSITY OF TECHNOLOGY   (Sweden)

Author keywords

Exascale; Fault Tolerance; High Performance Computing; Redundancy; Source to Source Compiler

Indexed keywords

EXASCALE; EXASCALE COMPUTING; HIGH PERFORMANCE COMPUTING; HIGH PERFORMANCE COMPUTING (HPC); PROGRAM EXECUTION; SOFTWARE DEVELOPMENT PROCESS; SOURCE-TO-SOURCE COMPILER; SOURCE-TO-SOURCE TRANSLATIONS;

ERRORS; FAULT TOLERANCE; FAULT TOLERANT COMPUTER SYSTEMS; HARDWARE; REDUNDANCY; SOFTWARE ENGINEERING;

PROGRAM COMPILERS;

EID: 84880877655     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSNW.2012.6264672     Document Type: Conference Paper

References (27)

1. LLNL, "Livermore loops benchmark," http://www.wikipedia.org/ Livermoreloops.
2. N. J. Wang, J. Quek, T. M. Rafacz, and S. J. Patel, "Characterizing the effects of transient faults on a high-performance processor pipeline," in Proceedings of the 2004 International Conference on Dependable Systems and Networks, ser. DSN '04. Washington, DC, USA: IEEE Computer Society, 2004.
3. R. Baumann, "Radiation-induced soft errors in advanced semiconductor technologies," IEEE Transactions on Device and Materials Reliability, Vol. 5, no. 3, pp. 305-316, sept. 2005.
4. F. Cappello, A. Geist, B. Gropp, L. Kale, B. Kramer, and M. Snir, "Toward exascale resilience," International Journal on High Performance Computing Applications, Vol. 23, pp. 374-388, November 2009.
5. H. Ando, Y. Yoshida, A. Inoue, I. Sugiyama, T. Asakawa, K. Morita, T. Muta, T. Motokurumada, S. Okada, H. Yamashita, Y. Satsukawa, A. Konmoto, R. Yamashita, and H. Sugiyama, "A 1.3 ghz fifth generation sparc64 microprocessor," in IEEE International Solid-State Circuits Conference (ISSCC), 2003. Digest of Technical Papers., Vol. 1, Feb 2003, pp. 246-491.
6. T. Austin, "Diva: a reliable substrate for deep submicron microarchitecture design," in International Symposium on Microarchitecture (MICRO'99, 1999, pp. 196-207. (Pubitemid 30516605)
7. J. Wakerly, "Partially self-checking circuits and their use in performing logical operations," IEEE Transactions on Computers, Vol. C-23, no. 7, pp. 658-666, july 1974.
8. V. D. Florio and C. Blondia, "A survey of linguistic structures for application-level fault tolerance," ACM Comput. Surv., Vol. 40, no. 2, pp. 6:1-6:37, May 2008.
9. D. Quinlan et al., "ROSE Compiler Infrastructure," http://www.rosecompiler.org/.
10. D. Quinlan and C. Liao, "The ROSE Source-to-Source Compiler Infrastructure," in Cetus Users and Compiler Infrastructure Workshop, in conjunction with PACT 2011, Galveston Island, Texas, USA, Oct. 2011.
11. D. Blough and G. Sullivan, "A comparison of voting strategies for fault-tolerant distributed systems," in Symposium on Reliable Distributed Systems, oct 1990, pp. 136-145.
12. R. S. Boyer and J. S. Moore, "Mjrty - a fast majority vote algorithm," in Automated Reasoning: Essays in Honor of Woody Bledsoe. Kluwer Academic Publishers, 1991, pp. 105-117.
13. S. Browne, J. Dongarra, N. Garner, K. London, and P. Mucci, "A scalable cross-platform infrastructure for application performance tuning using hardware counters," in Proceedings of the 2000 ACM/IEEE conference on Supercomputing, November 2000.
14. C.-K. Luk, R. Cohn, R. Muth, H. Patil, A. Klauser, G. Lowney, S. Wallace, V. J. Reddi, and K. Hazelwood, "Pin: building customized program analysis tools with dynamic instrumentation," in Programming Language Design and Implementation, ser. PLDI '05, 2005, pp. 190-200.
15. Y. Zhang, J. W. Lee, N. P. Johnson, and D. I. August, "Daft: decoupled acyclic fault tolerance," in International Conference on Parallel Architectures and Compilation Techniques, ser. PACT '10. ACM, 2010, pp. 87-98.
16. F. Buschmann, "Pattern languages of program design," J. O. Coplien and D. C. Schmidt, Eds., New York, NY, USA, 1995, ch. The Master-Slave Pattern, pp. 133-142.
17. F. Daniels, K. Kim, and M. Vouk, "The reliable hybrid pattern: a generalized software fault tolerant design pattern," in Pattern Languages of Programming (PLoP), 1997, pp. 1-9.
18. S. Yau and F.-C. Chen, "An approach to concurrent control flow checking," IEEE Transactions on Software Engineering, Vol. SE-6, no. 2, pp. 126-137, march 1980.
19. N. Oh, P. Shirvani, and E. McCluskey, "Control-flow checking by software signatures," IEEE Transactions on Reliability, Vol. 51, no. 1, pp. 111-122, mar 2002. (Pubitemid 34630928)
20. K.-H. Huang and J. Abraham, "Algorithm-based fault tolerance for matrix operations," IEEE Transactions on Computers, Vol. C-33, no. 6, pp. 518-528, june 1984. (Pubitemid 14584528)
21. A. Benso, S. Chiusano, P. Prinetto, and L. Tagliaferri, "A c/c++ source-to-source compiler for dependable applications," in International Conference on Dependable Systems and Networks (DSN), 2002, 2000, pp. 71-78.
22. M. Rebaudengo, M. Reorda, M. Violante, and M. Torchiano, "A source-to-source compiler for generating dependable software," in First IEEE International Workshop on Source Code Analysis and Manipulation, 2001., 2001, pp. 33-42.
23. M. Rela, H. Madeira, and J. Silva, "Experimental evaluation of the fail-silent behaviour in programs with consistency checks," in Proceedings of Annual Symposium on Fault Tolerant Computing, 1996., jun 1996, pp. 394-403.
24. A. Shye, J. Blomstedt, T. Moseley, V. Reddi, and D. Connors, "Plr: A software approach to transient fault tolerance for multicore architectures," IEEE Transactions on Dependable and Secure Computing, Vol. 6, no. 2, pp. 135-148, april-june 2009.
25. N. Oh, P. Shirvani, and E. McCluskey, "Error detection by duplicated instructions in super-scalar processors," IEEE Transactions on Reliability, Vol. 51, no. 1, pp. 63-75, mar 2002. (Pubitemid 34630924)
26. G. Reis, J. Chang, N. Vachharajani, R. Rangan, and D. August, "SWIFT: software implemented fault tolerance," in International Symposium on Code Generation and Optimization (CGO), 2005., march 2005, pp. 243-254. (Pubitemid 43773808)
27. J. Yu, M. J. Garzarán, and M. Snir, "Languages and compilers for parallel computing," V. Adve, M. J. Garzarán, and P. Petersen, Eds. Berlin, Heidelberg: Springer-Verlag, 2008, ch. Techniques for Efficient Software Checking, pp. 16-31.