-
1
-
-
0024656760
-
An analytical cache model
-
May
-
A. Agarwal, J. Hennessy, and M. Horowitz. An analytical cache model. ACM Transactions on Computer Systems, 7(2):184-215, May 1989.
-
(1989)
ACM Transactions on Computer Systems
, vol.7
, Issue.2
, pp. 184-215
-
-
Agarwal, A.1
Hennessy, J.2
Horowitz, M.3
-
2
-
-
0037331006
-
Simulating a $2M commercial server on a $2K PC
-
Feb.
-
A. R. Alameldeen, M. M. K. Martin, C. J. Mauer, K. E. Moore, M. Xu, D. J. Sorin, M. D. Hill, and D. A. Wood. Simulating a $2M commercial server on a $2K PC. IEEE Computer, 36(2):50-57, Feb. 2003.
-
(2003)
IEEE Computer
, vol.36
, Issue.2
, pp. 50-57
-
-
Alameldeen, A.R.1
Martin, M.M.K.2
Mauer, C.J.3
Moore, K.E.4
Xu, M.5
Sorin, D.J.6
Hill, M.D.7
Wood, D.A.8
-
3
-
-
33947715600
-
IPC considered harmful for multiprocessor workloads
-
Jul/Aug
-
A. R. Alameldeen and D. A. Wood. IPC considered harmful for multiprocessor workloads. IEEE Micro, 26(4):8-17, Jul/Aug 2006.
-
(2006)
IEEE Micro
, vol.26
, Issue.4
, pp. 8-17
-
-
Alameldeen, A.R.1
Wood, D.A.2
-
6
-
-
84900342836
-
SPEComp: A new benchmark suite for measuring parallel computer performance
-
July
-
V. Aslot, M. Domeika, R. Eigenmann, G. Gaertner, W. Jones, and B. Parady. SPEComp: A new benchmark suite for measuring parallel computer performance. In Workshop on OpenMP Applications and Tools, pages 1-10, July 2001.
-
(2001)
Workshop on OpenMP Applications and Tools
, pp. 1-10
-
-
Aslot, V.1
Domeika, M.2
Eigenmann, R.3
Gaertner, G.4
Jones, W.5
Parady, B.6
-
7
-
-
0003003638
-
A study of replacement algorithms for virtual-storage computer
-
L. A. Belady. A study of replacement algorithms for virtual-storage computer. IBM Systems Journal, 5(2):78-101, 1966.
-
(1966)
IBM Systems Journal
, vol.5
, Issue.2
, pp. 78-101
-
-
Belady, L.A.1
-
10
-
-
0014814325
-
Space/time trade-offs in hash coding with allowable errors
-
July
-
B. H. Bloom. Space/time trade-offs in hash coding with allowable errors. Communications of the ACM, 13(7):422-426, July 1970.
-
(1970)
Communications of the ACM
, vol.13
, Issue.7
, pp. 422-426
-
-
Bloom, B.H.1
-
11
-
-
0242312828
-
The coupon-collector problem revisited - A survey of engineering problems and computational methods
-
A. Boneh and M. Hofri. The coupon-collector problem revisited - a survey of engineering problems and computational methods. Communications in Statistics. Stochastic Models, 13(1):39-66, 1997.
-
(1997)
Communications in Statistics. Stochastic Models
, vol.13
, Issue.1
, pp. 39-66
-
-
Boneh, A.1
Hofri, M.2
-
16
-
-
84948754628
-
Integrating adaptive on-chip storage structures for reduced dynamic power
-
Sept.
-
S. Dropsho, A. Buyuktosunoglu, R. Balasubramonian, D. H. Albonesi, S. Dwarkadas, G. Semeraro, G. Magklis, and M. L. Scott. Integrating adaptive on-chip storage structures for reduced dynamic power. In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, pages 141-152, Sept. 2002.
-
(2002)
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques
, pp. 141-152
-
-
Dropsho, S.1
Buyuktosunoglu, A.2
Balasubramonian, R.3
Albonesi, D.H.4
Dwarkadas, S.5
Semeraro, G.6
Magklis, G.7
Scott, M.L.8
-
18
-
-
0036294454
-
Drowsy caches: Simple techniques for reducing leakage power
-
May
-
K. Flautner, N. S. Kim, S. Martin, D. Blaauw, and T. Mudge. Drowsy caches: simple techniques for reducing leakage power. In Proceedings of the 29th Annual International Symposium on Computer Architecture, pages 148-157, May 2002.
-
(2002)
Proceedings of the 29th Annual International Symposium on Computer Architecture
, pp. 148-157
-
-
Flautner, K.1
Kim, N.S.2
Martin, S.3
Blaauw, D.4
Mudge, T.5
-
19
-
-
0030243819
-
Energy dissipation in general purpose microprocessors
-
Sept.
-
R. Gonzalez and M. Horowitz. Energy dissipation in general purpose microprocessors. In IEEE Journal of Solid-State Circuits, pages 1277-1284, Sept. 1996.
-
(1996)
IEEE Journal of Solid-State Circuits
, pp. 1277-1284
-
-
Gonzalez, R.1
Horowitz, M.2
-
20
-
-
34548329435
-
A one-shot configurable-cache tuner for improved energy and performance
-
Apr.
-
A. Gordon-Ross, P. Viana, F. Vahid, W. Najjar, and E. Barros. A one-shot configurable-cache tuner for improved energy and performance. In Proceedings of the conference on Design, automation and test in Europe, pages 755-760, Apr. 2007.
-
(2007)
Proceedings of the Conference on Design, Automation and Test in Europe
, pp. 755-760
-
-
Gordon-Ross, A.1
Viana, P.2
Vahid, F.3
Najjar, W.4
Barros, E.5
-
21
-
-
0024903997
-
Evaluating associativity in CPU caches
-
Dec.
-
M. D. Hill and A. J. Smith. Evaluating associativity in CPU caches. IEEE Transactions on Computers, 38(12):1612-1630, Dec. 1989.
-
(1989)
IEEE Transactions on Computers
, vol.38
, Issue.12
, pp. 1612-1630
-
-
Hill, M.D.1
Smith, A.J.2
-
22
-
-
84875858098
-
Power management of the third generation intel core micro architecture formerly codenamed ivy bridge
-
Aug.
-
S. Jahagirdar, V. George, I. Sodhi, and R. Wells. Power management of the third generation Intel Core micro architecture formerly codenamed Ivy Bridge. In Hot Chips 24, Aug. 2012.
-
(2012)
Hot Chips
, vol.24
-
-
Jahagirdar, S.1
George, V.2
Sodhi, I.3
Wells, R.4
-
23
-
-
77953995402
-
Adapting cache partitioning algorithms to pseudo-LRU replacement policies
-
Apr.
-
K. Kedzierski, M. Moreto, F. Cazorla, and M. Valero. Adapting cache partitioning algorithms to pseudo-LRU replacement policies. In Proceedings of the 24th IEEE International Parallel and Distributed Processing Symposium, pages 1-12, Apr. 2010.
-
(2010)
Proceedings of the 24th IEEE International Parallel and Distributed Processing Symposium
, pp. 1-12
-
-
Kedzierski, K.1
Moreto, M.2
Cazorla, F.3
Valero, M.4
-
24
-
-
0028445155
-
A comparison of trace-sampling techniques for multi-megabyte caches
-
R. E. Kessler, M. D. Hill, and D. A. Wood. A comparison of trace-sampling techniques for multi-megabyte caches. IEEE Transactions on Computers, 43(6):664-675, 1994.
-
(1994)
IEEE Transactions on Computers
, vol.43
, Issue.6
, pp. 664-675
-
-
Kessler, R.E.1
Hill, M.D.2
Wood, D.A.3
-
26
-
-
0024107186
-
Accurate low-cost methods for performance evaluation of cache memory systems
-
S. Laha, J. H. Patel, and R. K. Iyer. Accurate low-cost methods for performance evaluation of cache memory systems. IEEE Transactions on Computers, 37(11):1325-1336, 1988.
-
(1988)
IEEE Transactions on Computers
, vol.37
, Issue.11
, pp. 1325-1336
-
-
Laha, S.1
Patel, J.H.2
Iyer, R.K.3
-
27
-
-
37549032725
-
IBM POWER6 microarchitecture
-
H. Le, W. Starke, J. Fields, F. O'Connell, D. Nguyen, B. Ronchetti, W. Sauer, E. Schwarz, and M. Vaden. IBM POWER6 microarchitecture. IBM Journal of Research and Development, 51(6), 2007.
-
(2007)
IBM Journal of Research and Development
, vol.51
, Issue.6
-
-
Le, H.1
Starke, W.2
Fields, J.3
O'Connell, F.4
Nguyen, D.5
Ronchetti, B.6
Sauer, W.7
Schwarz, E.8
Vaden, M.9
-
28
-
-
63549130253
-
Characterizing and modeling the behavior of context switch misses
-
Oct.
-
F. Liu, F. Guo, Y. Solihin, S. Kim, and A. Eker. Characterizing and modeling the behavior of context switch misses. In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, pages 91-101, Oct. 2008.
-
(2008)
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques
, pp. 91-101
-
-
Liu, F.1
Guo, F.2
Solihin, Y.3
Kim, S.4
Eker, A.5
-
31
-
-
33748870886
-
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset
-
Sept.
-
M. M. K. Martin, D. J. Sorin, B. M. Beckmann, M. R. Marty, M. Xu, A. R. Alameldeen, K. E. Moore, M. D. Hill, and D. A. Wood. Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset. Computer Architecture News, pages 92-99, Sept. 2005.
-
(2005)
Computer Architecture News
, pp. 92-99
-
-
Martin, M.M.K.1
Sorin, D.J.2
Beckmann, B.M.3
Marty, M.R.4
Xu, M.5
Alameldeen, A.R.6
Moore, K.E.7
Hill, M.D.8
Wood, D.A.9
-
32
-
-
0014701246
-
Evaluation techniques for storage hierarchies
-
R. L. Mattson, J. Gecsei, D. R. Slutz, and I. L. Traiger. Evaluation techniques for storage hierarchies. IBM Systems Journal, 9(2):78-117, 1970.
-
(1970)
IBM Systems Journal
, vol.9
, Issue.2
, pp. 78-117
-
-
Mattson, R.L.1
Gecsei, J.2
Slutz, D.R.3
Traiger, I.L.4
-
33
-
-
0004043480
-
-
PhD thesis, Dept. of Electrical and Computer Engineering, University of Massachusetts
-
T. R. Puzak. Analysis of Cache Replacement Algorithms. PhD thesis, Dept. of Electrical and Computer Engineering, University of Massachusetts, 1985.
-
(1985)
Analysis of Cache Replacement Algorithms
-
-
Puzak, T.R.1
-
34
-
-
33845874613
-
A case for MLP-aware cache replacement
-
June
-
M. K. Qureshi, D. N. Lynch, O. Mutlu, and Y. N. Patt. A case for MLP-aware cache replacement. In Proceedings of the 33rd Annual International Symposium on Computer Architecture, pages 167-178, June 2006.
-
(2006)
Proceedings of the 33rd Annual International Symposium on Computer Architecture
, pp. 167-178
-
-
Qureshi, M.K.1
Lynch, D.N.2
Mutlu, O.3
Patt, Y.N.4
-
37
-
-
47349104267
-
Implementing signatures for transactional memory
-
Dec.
-
D. Sanchez, L. Yen, M. D. Hill, and K. Sankaralingam. Implementing signatures for transactional memory. In Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture, pages 123-133, Dec. 2007.
-
(2007)
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture
, pp. 123-133
-
-
Sanchez, D.1
Yen, L.2
Hill, M.D.3
Sankaralingam, K.4
-
38
-
-
74449083877
-
Modeling and stack simulation of CMP cache capacity and accessibility
-
Dec.
-
X. Shi, F. Su, J.-K. Peir, and Z. Yang. Modeling and stack simulation of CMP cache capacity and accessibility. IEEE Transactions on Parallel and Distributed Systems, 20(12):1752-1763, Dec. 2009.
-
(2009)
IEEE Transactions on Parallel and Distributed Systems
, vol.20
, Issue.12
, pp. 1752-1763
-
-
Shi, X.1
Su, F.2
Peir, J.-K.3
Yang, Z.4
-
40
-
-
0017949328
-
A comparative study of set associative memory mapping algorithms and their use for cache and main memory
-
Mar.
-
A. J. Smith. A comparative study of set associative memory mapping algorithms and their use for cache and main memory. IEEE Transactions on Software Engineering, SE-4(2):121-130, Mar. 1978.
-
(1978)
IEEE Transactions on Software Engineering
, vol.SE-4
, Issue.2
, pp. 121-130
-
-
Smith, A.J.1
-
46
-
-
67650796123
-
RapidMRC: Approximating L2 miss rate curves on commodity systems for online optimizations
-
Mar.
-
D. K. Tam, R. Azimi, L. B. Soares, and M. Stumm. RapidMRC: approximating L2 miss rate curves on commodity systems for online optimizations. In Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, pages 121-132, Mar. 2009.
-
(2009)
Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems
, pp. 121-132
-
-
Tam, D.K.1
Azimi, R.2
Soares, L.B.3
Stumm, M.4
-
49
-
-
70349743894
-
Program locality analysis using reuse distance
-
Aug.
-
Y. Zhong, X. Shen, and C. Ding. Program locality analysis using reuse distance. ACM Transactions on Programming Languages and Systems, 31(6):1-39, Aug. 2009.
-
(2009)
ACM Transactions on Programming Languages and Systems
, vol.31
, Issue.6
, pp. 1-39
-
-
Zhong, Y.1
Shen, X.2
Ding, C.3
|