메뉴 건너뛰기




Volumn , Issue , 2012, Pages 317-328

Composite cores: Pushing heterogeneity into a core

Author keywords

core microarchitecure; heterogeneous architecture; reactive controller; split pipelines

Indexed keywords

ARCHITECTURAL SIMULATION; CORE MICROARCHITECURE; HETEROGENEOUS ARCHITECTURES; HETEROGENEOUS MULTICORE; INTELLIGENT CONTROLLERS; LIMITING PERFORMANCE; PROPOSED ARCHITECTURES; REDUCE ENERGY CONSUMPTION;

EID: 84876548838     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2012.37     Document Type: Conference Paper
Times cited : (118)

References (33)
  • 10
    • 48249118853 scopus 로고    scopus 로고
    • Amdahl's law in the multicore era
    • M. Hill and M. Marty, "Amdahl's law in the multicore era," IEEE Computer, no. 7, pp. 33-38, 2008.
    • (2008) IEEE Computer , Issue.7 , pp. 33-38
    • Hill, M.1    Marty, M.2
  • 15
    • 84655164816 scopus 로고    scopus 로고
    • A fully-integrated 3-level dcdc converter for nanosecond-scale dvfs
    • Jan.
    • W. Kim, D. Brooks, and G.-Y. Wei, "A fully-integrated 3-level dcdc converter for nanosecond-scale dvfs," IEEE Journal of Solid-State Circuits, vol. 47, no. 1, pp. 206-219, Jan. 2012.
    • (2012) IEEE Journal of Solid-State Circuits , vol.47 , Issue.1 , pp. 206-219
    • Kim, W.1    Brooks, D.2    Wei, G.-Y.3
  • 25
    • 84857806039 scopus 로고    scopus 로고
    • Efficiently exploiting memory level parallelism on asymmetric coupled cores in the dark silicon era
    • Jan.
    • G. Patsilaras, N. K. Choudhary, and J. Tuck, "Efficiently exploiting memory level parallelism on asymmetric coupled cores in the dark silicon era," ACM Trans. Archit. Code Optim., vol. 8, no. 4, pp. 28:1-28:21, Jan. 2012.
    • (2012) ACM Trans. Archit. Code Optim. , vol.8 , Issue.4 , pp. 281-2821
    • Patsilaras, G.1    Choudhary, N.K.2    Tuck, J.3
  • 26


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.