Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources

Proceedings of the Annual International Symposium on Microarchitecture

Volumn , Issue , 2001, Pages 90-101

  Ponomarev, Dmitry ^a   Kucuk, Gurhan ^a   Ghose, Kanad ^a  

^a State University of New York at Binghamton   (United States)

Author keywords

Dynamic instruction scheduling; Energy efficient datapath; Power reduction; Superscalar processor

Indexed keywords

BENCHMARKING; BUFFER STORAGE; MICROPROCESSOR CHIPS; SCHEDULING; SIMULATORS; STORAGE ALLOCATION (COMPUTER);

MULTIPLE DATAPATH RESOURCES;

PROGRAM PROCESSORS;

EID: 0035691607     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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