Decoupling the bias-stress-induced charge trapping in semiconductors and gate-dielectrics of organic transistors using a double stretched-exponential formula

Advanced Functional Materials

Volumn 23, Issue 6, 2013, Pages 690-696

  Choi, Hyun Ho ^a   Kang, Moon Sung ^b   Kim, Min ^a   Kim, Haena ^a   Cho, Jeong Ho ^c   Cho, Kilwon ^a  

^a Pohang University of Science and Technology (POSTECH)   (South Korea)

^b Soongsil University   (South Korea)

^c Sungkyunkwan University   (South Korea)

Author keywords

bias stress; charge trapping; double stretched exponential formula; organic field effect transistor

Indexed keywords

ANALYSIS METHOD; BIAS STRESS; CHANNEL CURRENTS; CHARACTERISTIC TIME; DOUBLE STRETCHED-EXPONENTIAL FORMULA; NOVEL STRATEGIES; ORGANIC FIELD-EFFECT TRANSISTOR (OFETS); ORGANIC TRANSISTOR; SEMICONDUCTOR LAYERS; TWO MODEL SYSTEMS; TWO PARAMETER;

ACTIVATION ENERGY; CHARGE TRAPPING; DIELECTRIC MATERIALS; ORGANIC FIELD EFFECT TRANSISTORS; SELF ASSEMBLED MONOLAYERS;

GATE DIELECTRICS;

EID: 84873680565     PISSN: 1616301X     EISSN: 16163028     Source Type: Journal    
DOI: 10.1002/adfm.201201545     Document Type: Article

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