메뉴 건너뛰기




Volumn 59, Issue 12, 2012, Pages 883-887

Ultra-low voltage split-data-aware embedded SRAM for mobile video applications

Author keywords

Embedded; MPEG 4; Negative bias temperature instability (NBTI); Process variation; Static random access memory (SRAM); Ultra low voltage

Indexed keywords

INTEGRATED CIRCUIT DESIGN; LOGIC DESIGN; MOTION PICTURE EXPERTS GROUP STANDARDS; NEGATIVE BIAS TEMPERATURE INSTABILITY;

EID: 84873479663     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2012.2231018     Document Type: Article
Times cited : (35)

References (11)
  • 1
    • 84855652495 scopus 로고    scopus 로고
    • Ultra-Low power VLSI circuit design demystified and explained: A tutorial
    • Jan
    • M. Alioto, "Ultra-Low power VLSI circuit design demystified and explained: A tutorial," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 59, no. 1, pp. 3-29, Jan. 2012.
    • (2012) IEEE Trans. Circuits Syst. I, Reg. Papers , vol.59 , Issue.1 , pp. 3-29
    • Alioto, M.1
  • 2
    • 79952010981 scopus 로고    scopus 로고
    • A priority-based 6 T/8 T hybrid SRAM architecture for aggressive voltage scaling in video applications
    • Feb
    • I. J. Chang, D. Mohapatra, and K. Roy, "A priority-based 6 T/8 T hybrid SRAM architecture for aggressive voltage scaling in video applications," IEEE Trans. Circuits Syst. Video Technol., vol. 21, no. 2, pp. 101-112, Feb. 2011.
    • (2011) IEEE Trans. Circuits Syst. Video Technol. , vol.21 , Issue.2 , pp. 101-112
    • Chang, I.J.1    Mohapatra, D.2    Roy, K.3
  • 3
  • 5
  • 6
    • 84873704538 scopus 로고    scopus 로고
    • [Online]
    • PTM Model. [Online]. Available: http://www.eas.asu.edu/~ptm
    • PTM Model
  • 7
    • 79951560872 scopus 로고    scopus 로고
    • Challenges and directions for low-voltage SRAM
    • Jan./Feb.
    • M. Qazi, M. E. Sinangil, and A. P. Chandrakasan, "Challenges and directions for low-voltage SRAM," IEEE Des. Test Comput., vol. 28, no. 1, pp. 32-43, Jan./Feb. 2011.
    • (2011) IEEE Des. Test Comput. , vol.28 , Issue.1 , pp. 32-43
    • Qazi, M.1    Sinangil, M.E.2    Chandrakasan, A.P.3
  • 9
    • 80052710738 scopus 로고    scopus 로고
    • 8 T singleended sub-threshold SRAM with crosspoint data-aware write operation
    • Aug.
    • Y.-W. Chiu, Y.-Y. Lin, M.-H. Tu, S.-J. Jou, and C.-T. Chuang, "8 T singleended sub-threshold SRAM with crosspoint data-aware write operation," in Proc. IEEE ISLPED, Aug. 2011, pp. 169-174.
    • (2011) Proc. IEEE ISLPED , pp. 169-174
    • Chiu, Y.-W.1    Lin, Y.-Y.2    Tu, M.-H.3    Jou, S.-J.4    Chuang, C.-T.5
  • 10
    • 0000194406 scopus 로고    scopus 로고
    • A low-power DCT core using adaptive bitwidth and arithmetic activity exploiting signal correlations and quantization
    • May
    • T. Xanthopoulos and A. P. Chandrakasan, "A low-power DCT core using adaptive bitwidth and arithmetic activity exploiting signal correlations and quantization," IEEE J. Solid-State Circuits, vol. 35, no. 5, pp. 740-750, May 2000.
    • (2000) IEEE J. Solid-State Circuits , vol.35 , Issue.5 , pp. 740-750
    • Xanthopoulos, T.1    Chandrakasan, A.P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.