A 10T non-precharge two-port SRAM for 74% power reduction in video processing

Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures

Volumn , Issue , 2007, Pages 107-112

  Noguchi, Hiroki ^a   Iguchi, Yusuke ^a   Fujiwara, Hidehiro ^a   Morita, Yasuhiro ^a   Nii, Koji ^a,b   Kawaguchi, Hiroshi ^a   Yoshimoto, Masahiko ^a  

^a KOBE UNIVERSITY   (Japan)

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

H.264; Low power SRAM; Non precharge SRAM; Two port SRAM; Video processing

Indexed keywords

ELECTRIC INVERTERS; ENERGY CONSERVATION; IMAGE PROCESSING; READOUT SYSTEMS; TRANSISTORS;

H.264; LOW-POWER SRAM; NON-PRECHARGE SRAM; TWO-PORT SRAM; VIDEO PROCESSING;

STATIC RANDOM ACCESS STORAGE;

EID: 36349002766     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2007.2     Document Type: Conference Paper

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