Challenges and directions for low-voltage SRAM

IEEE Design and Test of Computers

Volumn 28, Issue 1, 2011, Pages 32-43

  Qazi, Masood ^a   Sinangil, Mahmut E ^a   Chandrakasan, Anantha P ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

cache memories; CMOS memory circuits; design and test; embedded memory; low power electronics; low voltage electronics; random access storage; SRAM

Indexed keywords

CMOS MEMORY CIRCUITS; DESIGN AND TEST; EMBEDDED MEMORIES; LOW-VOLTAGE; SRAM;

POWER ELECTRONICS; STATIC RANDOM ACCESS STORAGE;

CACHE MEMORY;

EID: 79951560872     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2010.115     Document Type: Article

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