A Priority-based 6T/8T hybrid SRAM architecture for aggressive voltage scaling in video applications

IEEE Transactions on Circuits and Systems for Video Technology

Volumn 21, Issue 2, 2011, Pages 101-112

  Chang, Ik Joon ^a   Mohapatra, Debabrata ^a   Roy, Kaushik ^a  

^a University West Lafayette   (United States)

Author keywords

Aggressive voltage scaling in SRAM; hybrid SRAM array; low power SRAM design; process variation resilient SRAM; video memory

Indexed keywords

HYBRID SRAM ARRAY; LOW-POWER SRAM; PROCESS VARIATION RESILIENT SRAM; VIDEO MEMORY; VOLTAGE-SCALING;

DEGRADATION; LOGIC DESIGN; MEMORY ARCHITECTURE; MOTION PICTURE EXPERTS GROUP STANDARDS;

STATIC RANDOM ACCESS STORAGE;

EID: 79952010981     PISSN: 10518215     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSVT.2011.2105550     Document Type: Article

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