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Volumn , Issue , 2012, Pages

FPGA-based synthetic instrumentation for board test

Author keywords

[No Author keywords available]

Indexed keywords

AT-SPEED TESTING; BOARD-LEVEL; FPGA-BASED INSTRUMENTATION; PROGRAMMABLE LOGIC DEVICE; SYNTHETIC INSTRUMENTATION; SYNTHETIC INSTRUMENTS; SYSTEM COMPONENTS; TEST AND MEASUREMENT; TEST APPLICATIONS; TEST COST; TEST EQUIPMENTS;

EID: 84873125910     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.2012.6401571     Document Type: Conference Paper
Times cited : (18)

References (19)
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    • 1-6 Nov.
    • Geiger, P.B., Butkovich, S., "Boundary-Scan Adoption-An Industry Snapshot with Emphasis on the Semiconductor Industry", in Proc. Int. Test Conference (ITC'09), USA, 1-6 Nov. 2009, pp. 1-10.
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    • Geiger, P.B.1    Butkovich, S.2
  • 2
  • 3
    • 67249118961 scopus 로고    scopus 로고
    • Efficient high-speed interface verification and fault analysis
    • Nirmaier, T, et al. "Efficient High-Speed Interface Verification and Fault Analysis", in Proc. IEEE International Test Conference, 2008, pp. 1-9.
    • (2008) Proc. IEEE International Test Conference , pp. 1-9
    • Nirmaier, T.1
  • 5
    • 15844403475 scopus 로고    scopus 로고
    • At-speed on-chip diagnosis of board-level interconnect faults
    • Proceedings - Ninth IEEE European Test Symposium, ETS 2004
    • A. Jutman, "At-Speed On-Chip Diagnosis of Board-Level Interconnect Faults", in Formal Proc. of 9th IEEE ETS04, France, 2004, pp. 2-7. (Pubitemid 40423479)
    • (2004) Proceedings - Ninth IEEE European Test Symposium, ETS 2004 , pp. 2-7
    • Jutman, A.1
  • 8
    • 28344453981 scopus 로고    scopus 로고
    • Ieee standard test access port and boundary-scan architecture
    • IEEE Standard test access port and boundary-scan architecture, IEEE Std. 1149.1-2001, 2001.
    • (2001) IEEE Std. 1149.1-2001
  • 9
    • 0003500979 scopus 로고    scopus 로고
    • Kluwer Academic Publishers, Boston, MA, USA
    • K.P. Parker. The Boundary-Scan Handbook, Kluwer Academic Publishers, Boston, MA, USA, 2003, 373 p.
    • (2003) The Boundary-Scan Handbook , pp. 373
    • Parker, K.P.1
  • 10
    • 84873156065 scopus 로고    scopus 로고
    • DDR3 SDRAM Specification JESD79-3E, JEDEC Solid State Technology Association
    • DDR3 SDRAM Specification, JESD79-3E, JEDEC Solid State Technology Association
  • 12
    • 39749143361 scopus 로고    scopus 로고
    • Ijtag: The path to organized instrument connectivity
    • ITC 2007.
    • Crouch, A.L., "IJTAG: The path to organized instrument connectivity", in Proc. International Test Conference, 2007, ITC 2007. pp. 1-10.
    • (2007) Proc. International Test Conference , pp. 1-10
    • Crouch, A.L.1
  • 13
    • 79955773306 scopus 로고    scopus 로고
    • Built in self test (bist) survey-An industry snapshot of hvm component bist usage at board and system test
    • Malaysia, 30 Nov-2 Dec 2010
    • Conroy, Z., Hui Li, Balangue, J., "Built In Self Test (BIST) Survey-an industry snapshot of HVM component BIST usage at board and system test", in IEMT10, Malaysia, 30 Nov-2 Dec 2010, pp. 1-6.
    • IEMT10 , pp. 1-6
    • Conroy, Z.1    Li, H.2    Balangue, J.3
  • 16
    • 33847105793 scopus 로고    scopus 로고
    • Towards an understanding of no trouble found devices
    • Palm Springs, California, USA
    • S.Davidson. "Towards an understanding of no trouble found devices."-Proc. of VLSI Test Symposium, Palm Springs, California, USA, 2005, pp. 147-152.
    • (2005) Proc. of VLSI Test Symposium , pp. 147-152
    • Davidson, S.1
  • 17
    • 84873171027 scopus 로고    scopus 로고
    • How to test high-speed memory with non-intrusive embedded instruments", whitepaper
    • URL:
    • "How to test high-speed memory with non-intrusive embedded instruments", whitepaper, ASSET InterTech, 2012, URL: http://www.asset- intertech.com/Solutions/Board-Test-Debug/Memory-Test-Whitepaper
    • (2012) ASSET InterTech
  • 18
    • 84873144241 scopus 로고    scopus 로고
    • ChipScope Pro Software and Cores User Guide, Xilinx Inc URL:
    • ChipScope Pro Software and Cores User Guide, Xilinx Inc, 2012, URL: http://www.xilinx.com/support/documentation/sw-manuals/xilinx14-2/ chipscope-ro-sw-cores-ug029.pdf
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  • 19
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    • ChipVORX® Embedded Virtual Instruments URL:
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.