Energy-aware fault-tolerant network-on-chips for addressing multiple traffic classes

Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012

Volumn , Issue , 2012, Pages 242-249

  Jafri, Syed M A H ^a,b,d   Guang, Liang ^b   Hemani, Ahmed ^a   Paul, Kolin ^a,c   Plosila, Juha ^b,d   Tenhunen, Hannu ^a,b,d  

^a ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

^b UNIVERSITY OF TURKU   (Finland)

^c INDIAN INSTITUTE OF TECHNOLOGY DELHI   (India)

^d TURKU CENTRE FOR COMPUTER SCIENCE   (Finland)

Author keywords

Energy Aware Systems; Fault Tolerance; Network on Chips; Self Adaptive systems

Indexed keywords

ADAPTIVE STRATEGY; AGENT-BASED CONTROL; CASE METHOD; CONTROL LAYERS; DATA PATHS; ENERGY AWARE; ENERGY-AWARE SYSTEMS; ENERGY-EFFICIENT ARCHITECTURES; FAULT-TOLERANT; HIPERLAN; MATRIX MULTIPLICATION; MULTIPLE TRAFFIC CLASS; NETWORK ON CHIP; NETWORK-ON-CHIPS; OPERATING CONDITION; SELF-ADAPTIVE SYSTEM; SINGLE NETWORKS; TRAFFIC CLASS;

ADAPTIVE SYSTEMS; COST REDUCTION; DISTRIBUTED COMPUTER SYSTEMS; ENERGY EFFICIENCY; ENERGY UTILIZATION; FAULT TOLERANT COMPUTER SYSTEMS; MICROPROCESSOR CHIPS; SYSTEMS ANALYSIS;

FAULT TOLERANCE;

EID: 84872910369     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2012.49     Document Type: Conference Paper

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