Scheduling and optimization of fault-tolerant embedded systems with transparency/performance trade-offs

Transactions on Embedded Computing Systems

Volumn 11, Issue 3, 2012, Pages

  Izosimov, Viacheslav ^a   Pop, Paul ^b   Eles, Petru ^c   Peng, Zebo ^c  

^a Semcon AB   (Sweden)

^b TECHNICAL UNIVERSITY OF DENMARK   (Denmark)

^c LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT-TOLERANT; FAULT-TOLERANT APPLICATIONS; RE-EXECUTION; RECOVERY ACTIONS; TRANSIENT FAULTS;

COMMERCE; FAULT TOLERANCE; TRANSPARENCY;

RECOVERY;

EID: 84870154657     PISSN: 15399087     EISSN: 15583465     Source Type: Journal    
DOI: 10.1145/2345770.2345773     Document Type: Article

References (73)

1. AHN, K. D., KIM, J., AND HONG, S. J. 1997. Fault-tolerant real-time scheduling using passive replicas. In Proceedings of the Pacific Rim International Symposium on Fault-Tolerant Systems. 98-103.
2. AL-OMARI, R., SOMANI, A. K., AND MANIMARAN, G. 2001. A new fault-tolerant technique for improving schedulability in multiprocessor real-time systems. In Proceedings of the 15th International Parallel and Distributed Processing Symposium. 23-27.
3. ALSTROM, K., AND TORIN, J. 2001. Future architecture for flight control systems. In Proceedings of the 20th Conference on Digital Avionics Systems. 1B5/1-1B5/10.
4. AYAV, T., FRADET, P., AND GIRAULT, A. 2008. Implementing fault-tolerance in real-time programs by automatic program transformations. ACM Trans. Embed. Comput. Syst 7, 4, 1-43.
5. BALAKIRSKY, V. B. AND VINCK, A. J. H. 2006. Coding schemes for data transmission over bus systems. In Proceedings of the IEEE International Symposium on Information Theory. 1778-1782. (Pubitemid 351244404)
6. BENSO, A., DI CARLO, S., DI NATALE, G., AND PRINETTO, P. 2003. A watchdog processor to detect data and control flow errors. In Proceedings of the 9th IEEE On-Line Testing Symposium. 144-148.
7. BERTOSSI, A. AND MANCINI, L. 1994. Scheduling algorithms for fault-tolerance in hard-real time systems. Real Time Syst. 7, 3, 229-256.
8. BOURRET, P., FERNANDEZ, A., AND SEGUIN, C. 2004. Statistical criteria to rationalize the choice of runtime observation points in embedded software. In Proceedings of the 1st International Workshop on Testability Assessment. 41-49. (Pubitemid 40914821)
9. BURNS, A., DAVIS, R., AND PUNNEKKAT, S. 1996. Feasibility analysis of fault-tolerant real-time task sets. In Proceedings of the Euromicro Workshop on Real-Time Systems. 29-33.
10. CHEVOCHOT, P. AND PUAUT, I. 1999. Scheduling fault-tolerant distributed hard real-time tasks independently of the replication strategies. In Proceedings of the 6th International Conference on Real-Time Computing Systems and Applications. 356-363.
11. CLAESSON, V., POLEDNA, S., AND SODERBERG, J. 1998. The XBW model for dependable real-time systems. In Proceedings of the International Conference on Parallel and Distributed Systems. 130-138.
12. CONNER, J., XIE, Y., KANDEMIR, M., LINK, G., AND DICK, R. 2005. FD-HGAC: A hybrid heuristic/genetic algorithm hardware/software co-synthesis framework with fault detection. In Proceedings of the Asia and South Pacific Design Automation Conference. 709-712.
13. CONSTANTINESCU, C. 2003. Trends and challenges in VLSI circuit reliability. IEEE Micro 23, 4, 14-19.
14. ELES, P., DOBOLI, A., POP, P., AND PENG, Z. 2000. Scheduling with bus access optimization for distributed embedded systems. IEEE Trans. VLSI Syst. 8, 5, 472-491. (Pubitemid 32255524)
15. EMANI, K. C., KAM, K., AND ZAWODNIOK, M. 2007. Improvement of CAN BUS performance by using error-correction codes. In Proceedings of the IEEE Region 5 Technical Conference. 205-210.
16. GIRAULT, A., KALLA, H., SIGHIREANU, M., AND SOREL, Y. 2003. An algorithm for automatically obtaining distributed and fault-tolerant static schedules. In Proceedings of the International Conference on Dependable Systems and Networks. 159-168.
17. HAN, C. C., SHIN, K. G., AND WU, J. 2003. A fault-tolerant scheduling algorithm for real-time periodic tasks with possible software faults. IEEE Trans. Comput. 52, 3, 362-372.
18. HAN, J.-J. AND LI, Q.-H. 2005. Dynamic power-aware scheduling algorithms for real-time task sets with fault-tolerance in parallel and distributed computing environment. In Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium. 6-16.
19. HARELAND, S., MAIZ, J., ALAVI, M., MISTRY, K., WALSTA, S., AND DAI, C. H. 2001. Impact of CMOS process scaling and SOI on the soft error rates of logic processes. In Proceedings of the Symposium on VLSI Technology. 73-74. (Pubitemid 32950666)
20. HEINE, P., TURUNEN, J., LEHTONEN, M., AND OIKARINEN, A. 2005. Measured faults during lightning storms. In Proceedings of IEEE PowerTech.
21. IZOSIMOV, V. 2009. Scheduling and optimization of fault-tolerant distributed embedded systems, Ph.D. thesis No. 1290, Dept. of Computer and Information Science, Link̈oping University, Link̈oping, Sweden. Permanent link: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-51727.
22. IZOSIMOV, V., POP, P., ELES, P., AND PENG, Z. 2005. Design optimization of time- and cost-constrained fault-tolerant distributed embedded systems. In Proceedings of the Design Automation and Test in Europe Conference. 864-869. (Pubitemid 44172107)
23. IZOSIMOV, V., POP, P., ELES, P., AND PENG, Z. 2006a. Synthesis of fault-tolerant schedules with transparency/performance trade-offs for distributed embedded systems. In Proceedings of the Design Automation and Test in Europe Conference. 706-711.
24. IZOSIMOV, V., POP, P., ELES, P., AND PENG, Z. 2006b. Mapping of fault-tolerant applications with transparency on distributed embedded systems. In Proceedings of the 9th Euromicro Conference on Digital System Design. 313-320. (Pubitemid 47271495)
25. JUNIOR, D. B., VARGAS, F., SANTOS, M. B., TEIXEIRA, I. C., AND TEIXEIRA, J. P. 2004. Modeling and simulation of time domain faults in digital systems. In Proceedings of the 10th IEEE International On- Line Testing Symposium. 5-10.
26. KANDASAMY, N., HAYES, J. P., AND MURRAY, B. T. 2003a. Transparent recovery from intermittent faults in time-triggered distributed systems. IEEE Trans. Comput. 52, 2, 113-125.
27. KANDASAMY, N., HAYES, J. P., AND MURRAY, B. T. 2003b. Dependable communication synthesis for distributed embedded systems. In Proceedings of the Computer Safety, Reliability and Security Conference. 275-288.
28. KOPETZ, H. AND BAUER, G. 2003. The time-triggered architecture. Proc. IEEE 91, 1, 112-126.
29. KOPETZ, H., KANTZ, H., GRUNSTEIDL, G., PUSCHNER, P., AND REISINGER, J. 1990. Tolerating transient faults in MARS. In Proceedings of the 20th International Symposium on Fault-Tolerant Computing. 466-473.
30. KOPETZ, H., OBERMAISSER, R., PETI, P., AND SURI, N. 2004. From a federated to an integrated architecture for dependable embedded real-time systems. Tech. Rep. 22, Technische Universiẗat Wien, Vienna, Austria.
31. KOREN, I. AND KRISHNA, C. M. 2007. Fault-Tolerant Systems. Morgan Kaufmann Publishers.
32. KRISHNA, C. M., AND SINGH, A. D. 1993. Reliability of Checkpointed Real-Time Systems Using Time Redundancy. IEEE Trans. Reliab. 42, 3, 427-435.
33. LEE, H., SHIN, H., AND MIN, S.-L. 1999. Worst case timing requirement of real-time tasks with time redundancy. In Proceedings of the 6th International Conference on Real-Time Computing Systems and Applications. 410-414.
34. LIBERATO, F., MELHEM, R., AND MOSSE, D. 2000. Tolerance to multiple transient faults for aperiodic tasks in hard real-time systems. IEEE Trans. Comput. 49, 9, 906-914.
35. MAHESHWARI, A., BURLESON, W., AND TESSIER, R. 2004. Trading off transient fault tolerance and power consumption in deep submicron (DSM) VLSI circuits. IEEE Trans. VLSI Syst. 12, 3, 299-311.
36. MAY, T. C. AND WOODS, M. H. 1978. A new physical mechanism for soft error in dynamic memories. In Proceedings of the 16th International Reliability Physics Symposium. 33-40.
37. MELHEM, R., MOSSE, D., AND ELNOZAHY, E. 2004. The interplay of power management and fault recovery in real-time systems. IEEE Trans. Comput. 53, 2, 217-231.
38. METRA, C., FAVALLI, M., AND RICCO, B. 1998. On-line detection of logic errors due to crosstalk, delay, and transient faults. In Proceedings of the International Test Conference. 524-533.
39. NICOLESCU, B., SAVARIA, Y., AND VELAZCO, R. 2004. Software detection mechanisms providing full coverage against single bit-flip faults. IEEE Trans. Nucl. Sci. 51, 6, 3510-3518. (Pubitemid 40044040)
40. OH, N., SHIRVANI, P. P., AND MCCLUSKEY, E. J. 2002. Control-flow checking by software signatures. IEEE Trans. Reliab. 51, 2, 111-122. (Pubitemid 34630928)
41. OH, N., SHIRVANI, P. P., AND MCCLUSKEY, E. J. 2002. Error detection by duplicated instructions in superscalar processors. IEEE Trans. Reliab. 51, 1, 63-75. (Pubitemid 34630924)
42. ORAILOGLU, A. AND KARRI, R. 1994. Coactive scheduling and checkpoint determination during high level synthesis of self-recovering microarchitectures. IEEE Trans.VLSI Syst. 2, 3, 304-311.
43. PINELLO, C., CARLONI, L. P., AND SANGIOVANNI-VINCENTELLI, A. L. 2004. Fault-tolerant deployment of embedded software for cost-sensitive real-time feedback-control applications. In Proceedings of the Design, Automation and Test in Europe Conference. 1164-1169.
44. PINELLO, C., CARLONI, L. P., AND SANGIOVANNI-VINCENTELLI, A. L. 2008. Fault-tolerant distributed deployment of embedded control software. IEEE Trans. Comput.-Aid. Des. Integr. Circ. Syst. 27, 5, 906- 919. (Pubitemid 351596172)
45. PIRIOU, E., JEGO, C., ADDE, P., LE BIDAN, R., AND JEZEQUEL, M. 2006. Efficient architecture for Reed Solomon block turbo code. In Proceedings of the IEEE International Symposium on Circuits and Systems.
46. POLEDNA, S. 1995. Fault Tolerant Real-Time Systems-The Problem of Replica Determinism. Springer.
47. POP, P., ELES, P., AND PENG, Z. 2004. Analysis and Synthesis of Distributed Real-Time Embedded Systems. Kluwer Academic Publishers.
48. POP, P., ELES, P., AND PENG, Z. 2005. Schedulability-driven frame packing for multi-cluster distributed embedded systems. ACM Trans. Embed. Comput. Syst. 4, 1, 112-140.
49. POP, P., POULSEN, K. H., IZOSIMOV, V., AND ELES, P. 2007. Scheduling and voltage scaling for energy/reliability trade-offs in fault-tolerant time-triggered embedded systems. In Proceedings of the 5th IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis. 233-238. (Pubitemid 351210072)
50. POP, P., IZOSIMOV, V., ELES, P., AND PENG, Z. 2009. Design optimization of time- and cost-constrained fault-tolerant embedded systems with checkpointing and replication. IEEE Trans. VLSI Syst. 17, 3, 389-402.
51. PUNNEKKAT, S. AND BURNS, A. 1997. Analysis of checkpointing for schedulability of real-time systems. In Proceedings of the 4th International Workshop on Real-Time Computing Systems and Applications. 198-205.
52. PUSCHNER, P. AND BURNS, A. 2000. Guest editorial: A review of worst-case execution-time analysis. Real- Time Syst. 18, 2-3, 115-128.
53. REEVS, C. R. 1993. Modern Heuristic Techniques for Combinatorial Problems. Blackwell Scientific Publications, Oxford, UK.
54. ROSSI, D., OMANA, M., TOMA, F., AND METRA, C. 2005. Multiple Transient Faults in Logic: An Issue for Next Generation ICs? In Proceedings of the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 352-360. (Pubitemid 41731081)
55. SAVOR, T. AND SEVIORA, R. E. 1997. An approach to automatic detection of software failures in real-time systems. In Proceedings of the 3rd IEEE Real-Time Technology and Applications Symposium. 136-146.
56. SCIUTO, D., SILVANO, C., AND STEFANELLI, R. 1998. Systematic AUED codes for self-checking architectures. In Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. 183-191.
57. SHIVAKUMAR, P., KISTLER, M., KECKLER, S. W., BURGER, D., AND ALVISI, L. 2002. Modeling the effect of technology trends on the soft error rate of combinational logic. In Proceedings of the International Conference on Dependable Systems and Networks. 389-398.
58. SILVA, V. F., FERREIRA, J., AND FONSECA, J. A. 2007. Master replication and bus error detection in FTTCAN with multiple buses. In Proceedings of the IEEE Conference on Emerging Technologies & Factory Automation. 1107-1114.
59. SRINIVASAN, S., AND JHA, N. K. 1995. Hardware-software co-synthesis of fault-tolerant real-time distributed embedded systems. In Proceedings of the Europe Design Automation Conference. 334-339.
60. SHYE, A., MOSELEY, T., REDDI, V. J., BLOMSTEDT, J., AND CONNORS, D. A. 2007. Using process-level redundancy to exploit multiple cores for transient fault tolerance. In Proceedings of the International Conference on Dependable Systems and Networks. 297-306. (Pubitemid 350080435)
61. STRAUSS, B., MORGAN, M. G., APT, J., AND STANCIL, D. D. 2006. Unsafe at any airspeed? IEEE Spectrum 43, 3, 44-49.
62. TRIPAKIS, S. 2005. Two-phase distributed observation problems. In Proceedings of the 5th International Conference on Application of Concurrency to System Design. 98-105. (Pubitemid 44088261)
63. ULLMAN, D. 1975. NP-complete scheduling problems. Comput. Syst. Sci. 10, 384-393.
64. VELAZCO, R., FOUILLAT, P., AND REIS, R., EDS.. 2007. Radiation Effects on Embedded Systems. Springer.
65. VRANKEN, H. P. E., STEVENS, M. P. J., AND SEGERS, M. T. M. 1997. Design-for-debug in hardware/software co-design. In Proceedings of the 5th International Workshop on Hardware/Software Codesign. 35-39.
66. WANG, J. B. 2003. Reduction in conducted EMI noises of a switching power supply after thermal management design. IEE Proc. Electric Power Appl. 150, 3, 301-310.
67. WEI, H., STAN, M. R., SKADRON, K., SANKARANARAYANAN, K., GHOSH, S., AND VELUSAMY, S. 2004. Compact thermal modeling for temperature-aware design. In Proceedings of the Design Automation Conference. 878-883.
68. WEI, T., MISHRA, P., WU, K., AND LIANG, H. 2006. Online task-scheduling for fault-tolerant low-energy real-time systems. In Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. 522-527.
69. XIE, Y., LI, L., KANDEMIR, M., VIJAYKRISHNAN, N., AND IRWIN, M. J. 2004. Reliability-aware cosynthesis for embedded systems. In Proceedings of the 15th IEEE International Conference on Application-Specific Systems, Architectures and Processors. 41-50.
70. XIE, Y., LI, L., KANDEMIR, M., VIJAYKRISHNAN, N., AND IRWIN, M. J. 2007. Reliability-aware cosynthesis for embedded systems. J. VLSI Signal Processing 49, 1, 87-99.
71. XU, J. AND RANDELL, B. 1996. Roll-forward error recovery in embedded real-time systems. In Proceedings of the International Conference on Parallel and Distributed Systems. 414-421.
72. ZHANG, Y., AND CHAKRABARTY, K. 2006. A unified approach for fault tolerance and dynamic power management in fixed-priority real-time embedded systems. IEEE Trans. Comput.-Aid. Des. Integr. Circ. Syst. 25, 1, 111-125. (Pubitemid 43146103)
73. ZHU, D., MELHEM, R., AND MOSŚE, D. 2005. Energy efficient configuration for QoS in reliable parallel servers. In Proceedings of the 5th European Dependable Computing Conference. Lecture Notes in Computer Science, vol. 3463. 122-139. (Pubitemid 41312753)