-
1
-
-
0003776159
-
-
G. De Micheli and M. G. Sami, Eds., Norwell, MA: NATO ASI 1995, Kluwer Academic
-
G. De Micheli and M. G. Sami, Eds., Hardware/Software Co-Design. Norwell, MA: NATO ASI 1995, Kluwer Academic, 1996.
-
(1996)
Hardware/Software Co-Design
-
-
-
2
-
-
0031101696
-
Hardware/software co-design
-
G. De Micheli and R. K. Gupta, "Hardware/software co-design," Proc. IEEE, vol. 85, no. 3, pp. 349-365, 1997.
-
(1997)
Proc. IEEE
, vol.85
, Issue.3
, pp. 349-365
-
-
De Micheli, G.1
Gupta, R.K.2
-
3
-
-
0032048776
-
Codesign of embedded systems: Status and trends
-
Apr.-June
-
R. Ernst, "Codesign of embedded systems: Status and trends," IEEE Design Test Comput., pp. 45-54, Apr.-June 1998.
-
(1998)
IEEE Design Test Comput.
, pp. 45-54
-
-
Ernst, R.1
-
4
-
-
0029267089
-
Specification and design of embedded hardware-software systems
-
Spring
-
D. D. Gajski and F. Vahid, "Specification and design of embedded hardware-software systems," IEEE Design Test Comput., pp. 53-67, Spring 1995.
-
(1995)
IEEE Design Test Comput.
, pp. 53-67
-
-
Gajski, D.D.1
Vahid, F.2
-
6
-
-
0028464667
-
Hardware-software co-design of embedded systems
-
W. Wolf, "Hardware-software co-design of embedded systems," Proc. IEEE, vol. 82, no. 7, pp. 967-989, 1994.
-
(1994)
Proc. IEEE
, vol.82
, Issue.7
, pp. 967-989
-
-
Wolf, W.1
-
7
-
-
0016518855
-
NP-complete scheduling problems
-
J. D. Ullman, "NP-complete scheduling problems," J. Comput. Syst. Sci., vol. 10, pp. 384-393, 1975.
-
(1975)
J. Comput. Syst. Sci.
, vol.10
, pp. 384-393
-
-
Ullman, J.D.1
-
8
-
-
0032298323
-
Scheduling under control dependencies for heterogeneous architectures
-
A. Doboli and P. Eles, "Scheduling under control dependencies for heterogeneous architectures," in Proc. Int. Conf. Computer Design (ICCD), 1998, pp. 602-608.
-
(1998)
Proc. Int. Conf. Computer Design (ICCD)
, pp. 602-608
-
-
Doboli, A.1
Eles, P.2
-
9
-
-
0043196791
-
Scheduling of conditional process graphs for the synthesis of embedded systems
-
P. Eles, K. Kuchcinski, Z. Peng, A. Doboli, and P. Pop, "Scheduling of conditional process graphs for the synthesis of embedded systems," in Proc. Design Aut. Test Eur, 1998, pp. 132-138.
-
(1998)
Proc. Design Aut. Test Eur
, pp. 132-138
-
-
Eles, P.1
Kuchcinski, K.2
Peng, Z.3
Doboli, A.4
Pop, P.5
-
10
-
-
0031356812
-
Embedded program timing analysis based on path clustering and architecture classification
-
R. Ernst and W. Ye, "Embedded program timing analysis based on path clustering and architecture classification," in Proc. Int. Conf. CAD, 1997, pp. 598-604.
-
(1997)
Proc. Int. Conf. CAD
, pp. 598-604
-
-
Ernst, R.1
Ye, W.2
-
11
-
-
2342634088
-
Software estimation using a generic-processor model
-
J. Gong, D. D. Gajski, and S. Narayan, "Software estimation using a generic-processor model," in Proc. Eur. Design Test Conf., 1995, pp. 498-502.
-
(1995)
Proc. Eur. Design Test Conf.
, pp. 498-502
-
-
Gong, J.1
Gajski, D.D.2
Narayan, S.3
-
12
-
-
0029505686
-
A path-based technique for estimating hardware run-time in Hw/Sw-cosynthesis
-
J. Henkel and R. Ernst, "A path-based technique for estimating hardware run-time in Hw/Sw-cosynthesis," in Proc. Int. Symp. Syst. Synthesis, 1995, pp. 116-121.
-
(1995)
Proc. Int. Symp. Syst. Synthesis
, pp. 116-121
-
-
Henkel, J.1
Ernst, R.2
-
13
-
-
0029233511
-
Performance analysis of embedded software using implicit path enumeration
-
Y. S. Li and S. Malik, "Performance analysis of embedded software using implicit path enumeration," in Proc. ACM/IEEE DAC, 1995, pp. 456-461.
-
(1995)
Proc. ACM/IEEE DAC
, pp. 456-461
-
-
Li, Y.S.1
Malik, S.2
-
14
-
-
0033355604
-
An integrated path and timing analysis method based on cycle-level symbolic execution
-
T. Lundqvist and P. Stenström, "An integrated path and timing analysis method based on cycle-level symbolic execution," Real-Time Syst., vol. 17, no. 2/3, pp. 183-207, 1999.
-
(1999)
Real-Time Syst.
, vol.17
, Issue.2-3
, pp. 183-207
-
-
Lundqvist, T.1
Stenström, P.2
-
15
-
-
0030679977
-
Static timing analysis of embedded software
-
S. Malik, M. Martonosi, and Y. S. Li, "Static timing analysis of embedded software," in Proc. ACM/IEEE DAC, 1997, pp. 147-152.
-
(1997)
Proc. ACM/IEEE DAC
, pp. 147-152
-
-
Malik, S.1
Martonosi, M.2
Li, Y.S.3
-
16
-
-
0029716066
-
Efficient software performance estimation methods for hardware/software codesign
-
K. Suzuki and A. Sangiovanni-Vincentelli, "Efficient software performance estimation methods for hardware/software codesign," in Proc. ACM/IEEE DAC, 1996, pp. 605-610.
-
(1996)
Proc. ACM/IEEE DAC
, pp. 605-610
-
-
Suzuki, K.1
Sangiovanni-Vincentelli, A.2
-
17
-
-
84974687699
-
Scheduling algorithms for multiprogramming in a hard real-time environment
-
C. L. Liu and J. W. Layland, "Scheduling algorithms for multiprogramming in a hard real-time environment," J. ACM, vol. 20, no. 1, pp. 46-61, 1973.
-
(1973)
J. ACM
, vol.20
, Issue.1
, pp. 46-61
-
-
Liu, C.L.1
Layland, J.W.2
-
18
-
-
0028418313
-
Holistic schedulability analysis for distributed hard real-time systems
-
K. Tindell and J. Clark, "Holistic schedulability analysis for distributed hard real-time systems," Microprocess. Microprogram., vol. 40, pp. 117-134, 1994.
-
(1994)
Microprocess. Microprogram.
, vol.40
, pp. 117-134
-
-
Tindell, K.1
Clark, J.2
-
19
-
-
0029267687
-
Fixed priority pre-emptive scheduling: An historical perspective
-
N. C. Audsley, A. Burns, R. I. Davis, K. Tindell, and A. J. Wellings, "Fixed priority pre-emptive scheduling: An historical perspective," Real-Time Syst., vol. 8, no. 2/3, pp. 173-198, 1995.
-
(1995)
Real-Time Syst.
, vol.8
, Issue.2-3
, pp. 173-198
-
-
Audsley, N.C.1
Burns, A.2
Davis, R.I.3
Tindell, K.4
Wellings, A.J.5
-
20
-
-
0031708530
-
Scheduling for embedded real-time systems
-
Jan.-Mar.
-
F. Balarin, L. Lavagno, P. Murthy, and A. Sangiovanni-Vincentelli, "Scheduling for embedded real-time systems," IEEE Design Test Comput., pp. 71-82, Jan.-Mar. 1998.
-
(1998)
IEEE Design Test Comput.
, pp. 71-82
-
-
Balarin, F.1
Lavagno, L.2
Murthy, P.3
Sangiovanni-Vincentelli, A.4
-
22
-
-
0033308765
-
Synthesis of hard real-time application specific systems
-
C. Lee, M. Potkonjak, and W. Wolf, "Synthesis of hard real-time application specific systems," Design Automat. Embedded Syst., vol. 4, no. 4, pp. 215-241, 1999.
-
(1999)
Design Automat. Embedded Syst.
, vol.4
, Issue.4
, pp. 215-241
-
-
Lee, C.1
Potkonjak, M.2
Wolf, W.3
-
23
-
-
0032183521
-
COHRA: Hardware-software cosynthesis of hierarchical heterogeneous distributed systems
-
B. P. Dave and N. K. Jha, "COHRA: Hardware-software cosynthesis of hierarchical heterogeneous distributed systems," IEEE Trans. Computer-Aided Design, vol. 17, no. 10, pp. 900-919, 1998.
-
(1998)
IEEE Trans. Computer-Aided Design
, vol.17
, Issue.10
, pp. 900-919
-
-
Dave, B.P.1
Jha, N.K.2
-
24
-
-
0033096723
-
COSYN: Hardware-software co-synthesis of heterogeneous distributed embedded systems
-
B. P. Dave, G. Lakshminarayana, and N. J. Jha, "COSYN: Hardware-software co-synthesis of heterogeneous distributed embedded systems," IEEE Trans. VLSI Syst., vol. 7, no. 1, pp. 92-104, 1999.
-
(1999)
IEEE Trans. VLSI Syst.
, vol.7
, Issue.1
, pp. 92-104
-
-
Dave, B.P.1
Lakshminarayana, G.2
Jha, N.J.3
-
25
-
-
0029216608
-
Interval scheduling: Fine-grained code scheduling for embedded systems
-
P. Chou and G. Borriello, "Interval scheduling: Fine-grained code scheduling for embedded systems," in Proc. ACM/IEEE DAC, 1995, pp. 462-467.
-
(1995)
Proc. ACM/IEEE DAC
, pp. 462-467
-
-
Chou, P.1
Borriello, G.2
-
27
-
-
0030676723
-
Run-time scheduler synthesis for hardware-software systems and application to robot control design
-
V. Mooney, T. Sakamoto, and G. De Micheli, "Run-time scheduler synthesis for hardware-software systems and application to robot control design," in Proc. Int. Workshop Hardware-Software Co-Design, 1997, pp. 95-99.
-
(1997)
Proc. Int. Workshop Hardware-Software Co-Design
, pp. 95-99
-
-
Mooney, V.1
Sakamoto, T.2
De Micheli, G.3
-
29
-
-
0015482117
-
Optimal scheduling for two processor systems
-
E. G. Coffman Jr and R. L. Graham, "Optimal scheduling for two processor systems," Acta Inform., vol. 1, pp. 200-213, 1972.
-
(1972)
Acta Inform.
, vol.1
, pp. 200-213
-
-
Coffman Jr., E.G.1
Graham, R.L.2
-
31
-
-
0030142084
-
Dynamic critical-path scheduling: An effective technique for allocating task graphs to multiprocessors
-
Y. K. Kwok and I. Ahmad, "Dynamic critical-path scheduling: An effective technique for allocating task graphs to multiprocessors," IEEE Trans. Parallel Distrib. Syst., vol. 7, no. 5, pp. 506-521, 1996.
-
(1996)
IEEE Trans. Parallel Distrib. Syst.
, vol.7
, Issue.5
, pp. 506-521
-
-
Kwok, Y.K.1
Ahmad, I.2
-
32
-
-
0025462712
-
Hypertool: A programming aid for message-passing systems
-
M. Y. Wu and D. D. Gajski, "Hypertool: A programming aid for message-passing systems," IEEE Trans. Parallel Distrib. Syst., vol. 1, no. 3, pp. 330-343, 1990.
-
(1990)
IEEE Trans. Parallel Distrib. Syst.
, vol.1
, Issue.3
, pp. 330-343
-
-
Wu, M.Y.1
Gajski, D.D.2
-
33
-
-
85015544501
-
Process scheduling for performance estimation and synthesis of hardware/software systems
-
P. Eles, K. Kuchcinski, Z. Peng, A. Doboli, and P. Pop, "Process scheduling for performance estimation and synthesis of hardware/software systems," in Proc. Euromicro Conf., 1998, pp. 168-175.
-
(1998)
Proc. Euromicro Conf.
, pp. 168-175
-
-
Eles, P.1
Kuchcinski, K.2
Peng, Z.3
Doboli, A.4
Pop, P.5
-
34
-
-
0021529549
-
Practical multiprocessor scheduling algorithms for efficient parallel processing
-
H. Kasahara and S. Narita, "Practical multiprocessor scheduling algorithms for efficient parallel processing," IEEE Trans. Comput., vol. C-33, no. 11, pp. 1023-1029, 1984.
-
(1984)
IEEE Trans. Comput.
, vol.C-33
, Issue.11
, pp. 1023-1029
-
-
Kasahara, H.1
Narita, S.2
-
35
-
-
0029735299
-
Design of an optimal loosely coupled heterogeneous multiprocessor system
-
A. Bender, "Design of an optimal loosely coupled heterogeneous multiprocessor system," in Proc. ED&TC, 1996, pp. 275-281.
-
(1996)
Proc. ED&TC
, pp. 275-281
-
-
Bender, A.1
-
36
-
-
0000679218
-
SOS: Synthesis of application-specific heterogeneous multiprocessor systems
-
S. Prakash and A. Parker, "SOS: Synthesis of application-specific heterogeneous multiprocessor systems," J. Parallel Distrib. Comput., vol. 16, pp. 338-351, 1992.
-
(1992)
J. Parallel Distrib. Comput.
, vol.16
, pp. 338-351
-
-
Prakash, S.1
Parker, A.2
-
37
-
-
0030656668
-
Embedded system synthesis by timing constraint solving
-
K. Kuchcinski, "Embedded system synthesis by timing constraint solving," in Proc. Int. Symp. Syst. Synth., 1997, pp. 50-57.
-
Proc. Int. Symp. Syst. Synth.
, vol.1997
, pp. 50-57
-
-
Kuchcinski, K.1
-
38
-
-
22644449964
-
A timing-driven design and validation methodology for embedded real-time systems
-
A. Dasdan, D. Ramanathan, and R. K. Gupta, "A timing-driven design and validation methodology for embedded real-time systems," ACM Trans. Des. Aut. Electron. Syst., vol. 3, no. 4, pp. 533-553, 1998.
-
(1998)
ACM Trans. Des. Aut. Electron. Syst.
, vol.3
, Issue.4
, pp. 533-553
-
-
Dasdan, A.1
Ramanathan, D.2
Gupta, R.K.3
-
39
-
-
0032657005
-
Scheduling hardware/software systems using symbolic techniques
-
K. Strehl, L. Thiele, D. Ziegenbein, R. Ernst, and J. Teich, "Scheduling hardware/software systems using symbolic techniques," in Proc. Int. Workshop Hardware-Software Co-Design, 1999, pp. 173-177.
-
(1999)
Proc. Int. Workshop Hardware-Software Co-Design
, pp. 173-177
-
-
Strehl, K.1
Thiele, L.2
Ziegenbein, D.3
Ernst, R.4
Teich, J.5
-
40
-
-
0032320380
-
Representation of process model correlation for scheduling
-
D. Ziegenbein, K. Richter, R. Ernst, J. Teich, and L. Thiele, "Representation of process model correlation for scheduling," in Proc. Int. Conf. CAD, 1998, pp. 54-61.
-
(1998)
Proc. Int. Conf. CAD
, pp. 54-61
-
-
Ziegenbein, D.1
Richter, K.2
Ernst, R.3
Teich, J.4
Thiele, L.5
-
41
-
-
0029546570
-
The Chinook hardware/software co-synthesis system
-
P. H. Chou, R. B. Ortega, and G. Borriello, "The Chinook hardware/software co-synthesis system," in Proc. Int. Symp. Syst. Synthesis, 1995, pp. 22-27.
-
(1995)
Proc. Int. Symp. Syst. Synthesis
, pp. 22-27
-
-
Chou, P.H.1
Ortega, R.B.2
Borriello, G.3
-
42
-
-
0029505681
-
Synthesis of system-level communication by an allocation-based approach
-
J. M. Daveau, T. B. Ismail, and A. A. Jerraya, "Synthesis of system-level communication by an allocation-based approach," in Proc. Int. Symp. Syst. Synthesis, 1995, pp. 150-155.
-
(1995)
Proc. Int. Symp. Syst. Synthesis
, pp. 150-155
-
-
Daveau, J.M.1
Ismail, T.B.2
Jerraya, A.A.3
-
43
-
-
0032690911
-
Integrating communication protocol selection with hardware/software codesign
-
P. V. Knudsen and J. Madsen, "Integrating communication protocol selection with hardware/software codesign," IEEE Trans. Computer-Aided Design, vol. 18, no. 8, pp. 1077-1095, 1999.
-
(1999)
IEEE Trans. Computer-Aided Design
, vol.18
, Issue.8
, pp. 1077-1095
-
-
Knudsen, P.V.1
Madsen, J.2
-
45
-
-
0032320386
-
Communication synthesis for distributed embedded systems
-
R. B. Ortega and G. Borriello, "Communication synthesis for distributed embedded systems," in Proc. Int. Conf. CAD, 1998, pp. 437-444.
-
(1998)
Proc. Int. Conf. CAD
, pp. 437-444
-
-
Ortega, R.B.1
Borriello, G.2
-
46
-
-
0029359773
-
Calculating controller area network (CAN) message response times
-
K. Tindell, A. Burns, and A. J. Wellings, "Calculating controller area network (CAN) message response times," Contr. Eng. Practice, vol. 3, no. 8, pp. 1163-1169, 1995.
-
(1995)
Contr. Eng. Practice
, vol.3
, Issue.8
, pp. 1163-1169
-
-
Tindell, K.1
Burns, A.2
Wellings, A.J.3
-
47
-
-
0031343341
-
Response-time guarantees in ATM networks
-
H. Ermedahl, H. Hansson, and M. Sjödin, "Response-time guarantees in ATM networks," in Proc. IEEE Real-Time Systems Symp., 1997, pp. 274-284.
-
(1997)
Proc. IEEE Real-Time Systems Symp.
, pp. 274-284
-
-
Ermedahl, H.1
Hansson, H.2
Sjödin, M.3
-
48
-
-
0028317462
-
TTP - A protocol for fault-tolerant real-time systems
-
H. Kopetz and G. Grünsteidl, "TTP - A protocol for fault-tolerant real-time systems," IEEE Comput., vol. 27, no. 1, pp. 14-23, 1997.
-
(1997)
IEEE Comput.
, vol.27
, Issue.1
, pp. 14-23
-
-
Kopetz, H.1
Grünsteidl, G.2
-
49
-
-
33749970626
-
-
"X-by-wire consortium,", URL:http://www.vmars.tuwien.ac.at/projects/xbywire/.
-
X-by-wire Consortium
-
-
-
50
-
-
0030784055
-
System level hardware/software partitioning based on simulated annealing and tabu search
-
P. Eles, Z. Peng, K. Kuchcinski, and A. Doboli, "System level hardware/software partitioning based on simulated annealing and tabu search," Design Automat. Embedded Syst., vol. 2, no. 1, pp. 5-32, 1997.
-
(1997)
Design Automat. Embedded Syst.
, vol.2
, Issue.1
, pp. 5-32
-
-
Eles, P.1
Peng, Z.2
Kuchcinski, K.3
Doboli, A.4
-
51
-
-
0032639084
-
Scheduling with optimized communication for time-triggered embedded systems
-
P. Pop, P. Eles, and Z. Peng, "Scheduling with optimized communication for time-triggered embedded systems," in Proc. Int. Workshop Hardware-Software Co-Design, 1999, pp. 178-182.
-
(1999)
Proc. Int. Workshop Hardware-Software Co-Design
, pp. 178-182
-
-
Pop, P.1
Eles, P.2
Peng, Z.3
-
55
-
-
84893698081
-
Bus access optimization for distributed embedded systems based on schedulability analysis
-
P. Pop, P. Eles, and Z. Peng, "Bus access optimization for distributed embedded systems based on schedulability analysis," in Proc. Design Aut. Test Eur., 2000.
-
(2000)
Proc. Design Aut. Test Eur.
-
-
Pop, P.1
Eles, P.2
Peng, Z.3
|