Wafer scale thin-film transistors using different semiconducting purity nanotubes, dielectric materials and gate control

Solid-State Electronics

Volumn 79, Issue , 2013, Pages 37-44

  Narasimhamurthy, K C ^a,b   Paily, Roy ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY GUWAHATI   (India)

^b SIDDAGANGA INSTITUTE OF TECHNOLOGY   (India)

Author keywords

Global gate; Hafnium oxide; Local gate; Single walled carbon nanotube; Sub threshold slope; Thin film transistor

Indexed keywords

CHANNEL DIMENSION; CURRENT RATIOS; GATE CONTROL; GATE OXIDE; GATE STRUCTURE; GLOBAL GATE; HIGH-K DIELECTRIC; LARGE CURRENT DENSITY; LOCAL GATE; MAXIMUM CURRENT DENSITY; METALLIC NANOTUBES; ON-CURRENTS; PROCESS CONDITION; SEMI-CONDUCTING NANOTUBES; SUBTHRESHOLD; SUBTHRESHOLD SWING; THIN-FILM TRANSISTOR (TFTS); WAFER SCALE; WAFER SCALE FABRICATION;

AUTOMOBILE MANUFACTURE; CARBON NANOTUBES; CARRIER MOBILITY; FABRICATION; GATES (TRANSISTOR); HAFNIUM; NANOTUBES; SEMICONDUCTING ORGANIC COMPOUNDS; SINGLE-WALLED CARBON NANOTUBES (SWCN); THIN FILM TRANSISTORS; THRESHOLD VOLTAGE;

DIELECTRIC MATERIALS;

EID: 84869500707     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2012.07.015     Document Type: Article

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