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Volumn , Issue , 2012, Pages 548-559

The dynamic granularity memory system

Author keywords

[No Author keywords available]

Indexed keywords

CHIP MULTIPROCESSOR; COARSE-GRAINED; DYNAMIC OPERATIONS; MAIN MEMORY; MANY CORE; MEMORY ACCESS; MEMORY BANDWIDTHS; MEMORY SYSTEMS; MULTI-GRANULARITY; POWER EFFICIENCY;

EID: 84864862775     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCA.2012.6237047     Document Type: Conference Paper
Times cited : (58)

References (43)
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    • System-level performance metrics for multiprogram workloads
    • S. Eyerman and L. Eeckhout. System-level performance metrics for multiprogram workloads. IEEE Micro, 28(3):42-53, 2008.
    • (2008) IEEE Micro , vol.28 , Issue.3 , pp. 42-53
    • Eyerman, S.1    Eeckhout, L.2
  • 22
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    • Structural aspects of the system/360 model 85, part II: The cache
    • J. S. Liptay. Structural aspects of the system/360 model 85, part II: The cache. IBM Systems Journal, 7:15-21, 1968.
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    • Micron Corp. Micron 1 Gb ×4, ×8, ×16, DDR3 SDRAM: MT41J256M4, MT41J128M8, and MT41J64M16, 2006
    • Micron Corp. Micron 1 Gb ×4, ×8, ×16, DDR3 SDRAM: MT41J256M4, MT41J128M8, and MT41J64M16, 2006.
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    • On the memory accesspatterns of supercoputer applications: Benchmark selection and its implications
    • Jul.
    • R. C. Murphy and P. M. Kogge. On the memory accesspatterns of supercoputer applications: Benchmark selection and its implications. IEEE Transactions on Computers, 56(7):937-945, Jul. 2007.
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    • Murphy, R.C.1    Kogge, P.M.2
  • 33
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    • Impact and mitigation of DRAM and SRAM soft errors
    • May
    • C. Slayman. Impact and mitigation of DRAM and SRAM soft errors. IEEE SCV Reliability Seminar http://www.ewh.ieee.org/r6/scv/rl/articles/ Soft%20Error%20mitigation.pdf, May 2010.
    • (2010) IEEE SCV Reliability Seminar
    • Slayman, C.1
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    • Standard Performance Evaluation Corporation. SPEC CPU 2006. http://www.spec.org/cpu2006/, 2006.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.