-
1
-
-
51949114723
-
A 167-processor 65nm Computational Platform with per-Processor Dynamic Supply Voltage and Dynamic Clock Frequency Scaling
-
D.Truong et al., "A 167-processor 65nm Computational Platform with per-Processor Dynamic Supply Voltage and Dynamic Clock Frequency Scaling," International symposium of VLSI Circuits, pp. 22-23, 2008.
-
(2008)
International Symposium of VLSI Circuits
, pp. 22-23
-
-
Truong, D.1
-
3
-
-
49549084422
-
A Third-Generation 65nm 16-Core 32-thread Plus32-Scout-Thread CMY SPARC Processor
-
S.Tremblay et al., "A Third-Generation 65nm 16-Core 32-thread Plus32-Scout-Thread CMY SPARC Processor," International Solid State Circuits Conference, pp. 82-83, 2008.
-
(2008)
International Solid State Circuits Conference
, pp. 82-83
-
-
Tremblay, S.1
-
4
-
-
39749130315
-
A 5.1 GHz 0.34mm2 Router for Network-on-Chip Applications
-
S. Vangal et al., "A 5.1 GHz 0.34mm2 Router for Network-on-Chip Applications," International Symposium on VLSI Circuits, pp. 42-43, 2007.
-
(2007)
International Symposium on VLSI Circuits
, pp. 42-43
-
-
Vangal, S.1
-
5
-
-
77952175242
-
A 4.1Tb/s Bisection-Bandwidth 560Fb/s/W Streaming Circuit-Switched 8x8 Mesh Network-on-Chip in 45nm CMOS
-
M.Anders et al., "A 4.1Tb/s Bisection-Bandwidth 560Fb/s/W Streaming Circuit-Switched 8x8 Mesh Network-on-Chip in 45nm CMOS," International Solid State Circuits Conference, pp. 110-111, 2010.
-
(2010)
International Solid State Circuits Conference
, pp. 110-111
-
-
Anders, M.1
-
6
-
-
58049103652
-
A 211 GOPS/W Dual-Mode Real-time Object Recognition Processor with Network-on-Chip
-
K.Kim et al., "A 211 GOPS/W Dual-Mode Real-time Object Recognition Processor with Network-on-Chip," European Solid State Circuits Conference, pp. 462-465, 2008.
-
(2008)
European Solid State Circuits Conference
, pp. 462-465
-
-
Kim, K.1
-
7
-
-
77954160108
-
A 118.4 GB/s multi-casting Network-on-Chip with hierarchical star-ring combines topology for real-time object recognition
-
J.Kim et al., "A 118.4 GB/s multi-casting Network-on-Chip with hierarchical star-ring combines topology for real-time object recognition," Journal of Solid State Circuits, vol.45 pp. 1309-1409, 2010.
-
(2010)
Journal of Solid State Circuits
, vol.45
, pp. 1309-1409
-
-
Kim, J.1
-
8
-
-
33846044638
-
ElastIC: An Adaptive Self-Healing Architecture for Unpredictable Silicon
-
E. Karl et al., "ElastIC: An Adaptive Self-Healing Architecture for Unpredictable Silicon," IEEE Design and Test of Computers, Vol. 23, No. 6, pp. 484-490, 2006.
-
(2006)
IEEE Design and Test of Computers
, vol.23
, Issue.6
, pp. 484-490
-
-
Karl, E.1
-
9
-
-
0031189542
-
AMBA: Enabling reusable on-chip designs
-
D. Flynni et al., "AMBA: enabling reusable on-chip designs," IEEE Micro, pp. 20-27, 1997.
-
(1997)
IEEE Micro
, pp. 20-27
-
-
Flynni, D.1
-
10
-
-
20344374162
-
Niagara: A 32-way multithreaded Sparc processor
-
P. Kongetira et al., "Niagara: A 32-way multithreaded Sparc processor," IEEE Micro, pp. 21-29, 2005.
-
(2005)
IEEE Micro
, pp. 21-29
-
-
Kongetira, P.1
-
11
-
-
77957974226
-
A 2Tb/s 6x4 Mesh Network with DVFS and 2.3Tb/s/W router in 45nm CMOS
-
P. Salihundam et al. ,"A 2Tb/s 6x4 Mesh Network with DVFS and 2.3Tb/s/W router in 45nm CMOS," International Symposium on VLSI Circuits, pp. 79-80, 2010.
-
(2010)
International Symposium on VLSI Circuits
, pp. 79-80
-
-
Salihundam, P.1
-
12
-
-
77957996907
-
A 1.07 Tbit/s 128x128 Swizzle Network for SIMD Processors
-
S. Satpathy et al., "A 1.07 Tbit/s 128x128 Swizzle Network for SIMD Processors," International Symposium on VLSI Circuits, pp. 81-82, 2010.
-
(2010)
International Symposium on VLSI Circuits
, pp. 81-82
-
-
Satpathy, S.1
-
13
-
-
84863556047
-
Probabilistic distance-based arbitration: Providing equality of service for many-core CMPs
-
M. Lee et al., "Probabilistic distance-based arbitration: Providing equality of service for many-core CMPs," IEEE MICRO, 2010.
-
(2010)
IEEE MICRO
-
-
Lee, M.1
-
14
-
-
84863541505
-
SWIFT: A 2.1Tb/s 32x32 self-arbitrating many-core interconnect fabric
-
S. Satpathy et al., "SWIFT: A 2.1Tb/s 32x32 self-arbitrating many-core interconnect fabric," International Symposium on VLSI Circuits, pp. 81-82, 2010.
-
(2010)
International Symposium on VLSI Circuits
, pp. 81-82
-
-
Satpathy, S.1
|