A 118.4 GB/s multi-casting network-on-chip with hierarchical star-ring combined topology for real-time object recognition

IEEE Journal of Solid-State Circuits

Volumn 45, Issue 7, 2010, Pages 1399-1409

  Kim, Joo Young ^a   Park, Junyoung ^a   Lee, Seungjin ^a   Kim, Minsu ^a   Oh, Jinwook ^a   Yoo, Hoi Jun ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

Hierarchical star ring combined topology; multi casting; network on chip; object recognition

Indexed keywords

APPLICATION-SPECIFIC; CMOS PROCESSS; COMMUNICATION PLATFORMS; DATA TRANSACTION; ENERGY CONSUMPTION; HIERARCHICAL STAR-RING COMBINED TOPOLOGY; INTER PROCESSOR COMMUNICATION; LOW LATENCY; NETWORK ON CHIP; NOC DESIGN; REAL-TIME OBJECT RECOGNITION; TARGET OBJECT; TRAFFIC PATTERN;

CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; NANOTECHNOLOGY; ROUTERS; TOPOLOGY; VLSI CIRCUITS;

OBJECT RECOGNITION;

EID: 77954160108     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2010.2048085     Document Type: Conference Paper

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