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Volumn 55, Issue 19-20, 2012, Pages 5222-5232

On the significance of developing boundary layers in integrated water cooled 3D chip stacks

Author keywords

3D integrated water cooling; CFD; Chip stack; Developing flow; Micro cooling structure; Porous medium

Indexed keywords

CHIP STACK; DEVELOPING FLOW; MICRO COOLING; POROUS MEDIUM; WATER COOLING;

EID: 84863507987     PISSN: 00179310     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.ijheatmasstransfer.2012.05.029     Document Type: Article
Times cited : (16)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.