Interlayer cooling potential in vertically integrated packages

Microsystem Technologies

Volumn 15, Issue 1 SPEC. ISS., 2009, Pages 57-74

  Brunschwiler, T ^a   Michel, B ^a   Rothuizen, H ^a   Kloter, U ^a   Wunderle, B ^b   Oppermann, H ^b   Reichl, H ^c  

^a IBM RESEARCH ZURICH   (Switzerland)

^b FRAUNHOFER IZM   (Germany)

^c TECHNISCHE UNIVERSITÄT BERLIN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ABSORPTION; COMPUTATIONAL FLUID DYNAMICS; COOLANTS; COOLING; COOLING WATER; CORRELATION METHODS; DEWATERING; DROPS; EXPERIMENTS; FINS (HEAT EXCHANGE); FLUID DYNAMICS; HEAT EXCHANGERS; HEAT FLUX; HEAT TRANSFER; HEATING EQUIPMENT; REYNOLDS NUMBER; SPECIFIC HEAT; THERMOANALYSIS;

CHIP STACKS; COOLANT TEMPERATURES; COOLING PERFORMANCES; COOLING POTENTIALS; EFFICIENT; EXPERIMENTAL DATUM; EXPERIMENTAL INVESTIGATIONS; FLUID STRUCTURES; FRICTION FACTORS; HEAT TRANSFER AREAS; HIGH-PERFORMANCE; HYDRAULIC DIAMETERS; HYDRODYNAMIC FLOWS; IN CHIPS; IN-LINE; INTEGRATED PACKAGES; JUNCTION TEMPERATURES; PARALLEL PLATES; PIN FINS; RANGING; SENSIBLE HEATS; STAGGERED CONFIGURATIONS;

DATA STRUCTURES;

EID: 54049110736     PISSN: 09467076     EISSN: None     Source Type: Journal    
DOI: 10.1007/s00542-008-0690-4     Document Type: Conference Paper

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