HELIX: Automatic parallelization of irregular programs for chip multiprocessing

Proceedings - International Symposium on Code Generation and Optimization, CGO 2012

Volumn , Issue , 2012, Pages 84-93

  Campanoni, Simone ^a   Jones, Timothy ^b   Holloway, Glenn ^a   Reddi, Vijay Janapa ^c   Wei, Gu Yeon ^a   Brooks, David ^a  

^a HARVARD UNIVERSITY   (United States)

^b UNIVERSITY OF CAMBRIDGE   (United Kingdom)

^c UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC PARALLELIZATION; CHIP MULTIPROCESSING; CODE OPTIMIZATION; COMMUNICATION COST; DATA DEPENDENCE; HELPER THREAD; OPTIMIZING COMPILERS; PARALLELIZATIONS; PREFETCHES; PROFILE DATA; SEQUENTIAL PROGRAMS; SUCCESSIVE ITERATION; SYNCHRONIZATION SIGNALS;

NETWORK COMPONENTS; PROGRAM COMPILERS;

OPTIMIZATION;

EID: 84863473415     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2259016.2259028     Document Type: Conference Paper

References (42)

1. Intel 64 and IA-32 Architectures Software Developer's Manual. Specification, 2010.
2. S. Adve and K. Gharachorloo. Shared memory consistency models: A tutorial. IEEE Computer, 1995.
3. A. Aiken and A. Nicolau. Perfect pipelining: A new loop parallelization technique. ESOP, 1988.
4. J. Allen and K. Kennedy. Optimizing compilers for modern architectures. Morgan Kaufmann, 2002.
5. G. Amdahl. Validity of the single processor approach to achieving large scale computing capabilities. Proc. Spring Joint Computer Conference, 1967.
6. A. Appel. Modern Compiler Implementation in Java, 2nd edition. 2002.
7. M. Bridges et al. Revisiting the sequential programming model for the multicore era. IEEE Micro, 2008.
8. S. Campanoni et al. A highly flexible, parallel virtual machine: Design and experience of ILDJIT. Softw. Pract. Exper., 2010.
9. R. Chappell et al. Simultaneous subordinate microthreading (SSMT). ISCA, 1999.
10. D-K. Chen and P-C. Yew. An empirical study on DOACROSS loops. 1991.
11. D-K. Chen and P-C. Yew. Statement re-ordering for DOACROSS loops. ICPP, 1994.
12. D-K. Chen and P-C. Yew. On effective execution of nonuniform DOACROSS loops. IEEE Transactions on Parallel and Distributed Systems, 1996.
13. D-K. Chen and P-C. Yew. Redundant synchronization elimination for DOACROSS loops. Parallel and Distributed Systems, IEEE Transactions on, 10(5), May 1999.
14. R. Costa et al. Gcc4cli. http://gcc.gnu.org/projects/cli.html.
15. R. Cytron. DOACROSS: Beyond vectorization for multiprocessors. ICPP, 1986.
16. F. Dang and L. Rauchwerger. Speculative parallelization of partially parallel loops. In 5th International Workshop on Languages, Compilers, and Run-Time Systems for Scalable Computers, pages 285-299, 2000.
17. B. Guo et al. Practical and accurate low-level pointer analysis. 2005.
18. J. Gustafson. Reevaluating Amdahl's law. Commun. ACM, 31, May 1988.
19. Jialu H. et al. Decoupled software pipelining creates parallelization opportunities. CGO, 2010.
20. A. Hurson et al. Parallelization of DOALL and DOACROSS loops - a survey. Advances in Computers, 1997.
21. VTune. http://software.intel.com/en-us/intel-vtune.
22. D. Kim et al. Physical experimentation with prefetching helper threads on Intel's hyper-threaded processors. CGO, 2004.
23. H. Kim et al. Scalable speculative parallelization on commodity clusters. MICRO, 2010.
24. J. Lim et al. A loop allocation policy for DOACROSS loops. SPDP, 1996.
25. D. Liu et al. Optimal loop parallelization for maximizing iteration-level parallelism. CASES, 2009.
26. J. Lo et al. Converting thread-level parallelism to instruction-level parallelism via simultaneous multithreading. TCS, 1997.
27. C-K. Luk. Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors. SIGARCH Comp. Arch. News, 2001.
28. A. Nicolau et al. Synchronization optimizations for efficient execution on multi-cores. ICS, 2009.
29. A. Nicolau et al. Techniques for efficient placement of synchronization primitives. PPoPP, 2009.
30. G. Ottoni et al. Automatic thread extraction with decoupled software pipelining. MICRO, 2005.
31. M. Prabhu and K. Olukotun. Exposing speculative thread parallelism in SPEC2000. PPoPP, 2000.
32. A. Raman et al. Speculative parallelization using software multi-threaded transactions. ASPLOS, 2010.
33. E. Raman et al. Parallel-Stage decoupled software pipelining. CGO, 2008.
34. R. Rangan et al. Performance scalability of decoupled software pipelining. TACO, 2008.
35. J. Seung-Ju and K. Gil-Yong. Spin-block synchronization algorithm in the shared memory multiprocessor system. SIGOPS Oper. Syst. Rev., 1994.
36. H-M. Su and P-C. Yew. Efficient DOACROSS execution on distributed shared-memory multiprocessors. ACM/IEEE conference on Supercomputing, 1991.
37. W. Thies et al. A practical approach to exploiting coarse-grained pipeline parallelism in C programs. MICRO, 2007.
38. G. Tournavitis et al. Towards a holistic approach to auto- parallelization. PLDI, 2009.
39. N. Vachharajani et al. Speculative decoupled software pipelining. PACT, 2007.
40. C.-Z. Xu and V. Chaudhary. Time stamp algorithms for runtime parallelization of DOACROSS loops with dynamic dependences. TPDS, 2001.
41. H. Zhong et al. Uncovering hidden loop level parallelism in sequential applications. HPCA, 2008.
42. X. Zhuang et al. Exploiting parallelism with dependence-aware scheduling. In PACT, pages 193-202, 2009.