Parallel-stage decoupled software pipelining

Proceedings of the 2008 CGO - Sixth International Symposium on Code Generation and Optimization

Volumn , Issue , 2008, Pages 114-123

  Raman, Easwaran ^a   Ottoni, Guilherme ^a   Raman, Arun ^a   Bridges, Matthew J ^a   August, David I ^a  

^a Princeton University

Author keywords

Automatic parallelization; DOALL; DSWP; Multi core architectures; Pipelined parallelism; TLP

Indexed keywords

AUTOMATIC PARALLELIZATION; MULTI-CORE ARCHITECTURES; PIPELINED PARALLELISM;

COMPUTATION THEORY; ITERATIVE METHODS; MICROPROCESSOR CHIPS; SOFTWARE ARCHITECTURE;

COMPUTER SOFTWARE;

EID: 43449113286     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1356058.1356074     Document Type: Conference Paper

References (24)