A mechanistic performance model for superscalar in-order processors

ISPASS 2012 - IEEE International Symposium on Performance Analysis of Systems and Software

Volumn , Issue , 2012, Pages 14-24

  Breughe, Maximilien ^a   Eyerman, Stijn ^a   Eeckhout, Lieven ^a  

^a GHENT UNIVERSITY   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

BRANCH MISPREDICTIONS; COMPILER OPTIMIZATIONS; CYCLE-ACCURATE SIMULATION; DESIGN SPACE EXPLORATION; DETAILED MODELING; MECHANISTIC MODELING; MICRO ARCHITECTURES; OUT OF ORDER; OUT-OF-ORDER PROCESSORS; PERFORMANCE MODEL; PERFORMANCE MODELING; PERFORMANCE PREDICTION; PROCESSOR PERFORMANCE; SCALING TRENDS; SUPERSCALAR; UNDERLYING MECHANISM;

PROGRAM PROCESSORS; SPACE RESEARCH;

COMPUTER SIMULATION;

EID: 84862099727     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPASS.2012.6189202     Document Type: Conference Paper

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